Semiconductor Inspection Pattern Merging for Misalignment Detection
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Solution Overview
Problem
The increasing miniaturization of semiconductor devices narrows the tolerable range for misalignment, and the detection accuracy of inspection patterns is degraded due to residual traces of previous inspection patterns, leading to erroneous detection and increased manufacturing costs.
Innovation Solution
A method is implemented where a second inspection pattern is formed to cover the entire region of the first inspection pattern, with a larger size and shape to prevent erroneous detection by completely covering the trace of the first inspection pattern, thereby improving detection accuracy and reducing manufacturing time and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple inspection patterns are disposed in the scribe region for each lithographic step, then misalignment detection capability is improved, but the area of the scribe region increases
Solution Approach 1:
Multiple inspection patterns for different lithographic steps are merged and disposed at the same position in the scribe region. The first inspection pattern for the first ion implantation step and the second inspection pattern for the second ion implantation step are overlaid at the same location, allowing misalignment detection for multiple steps without increasing scribe region area.
Solution Approach 2:
The inspection pattern formation region serves multiple functions by accommodating inspection patterns for different lithographic steps at the same position. A single region is used to detect misalignment for both the first and second ion implantation steps, making the scribe region more versatile and efficient.
2Manufacturing precision
If the tolerable range for misalignment is narrowed due to device miniaturization, then device precision is improved, but detection accuracy of inspection pattern is degraded by residual traces
Solution Approach 1:
The first inspection pattern is completely removed after the first ion implantation step is completed. By extracting and removing the first inspection pattern, residual traces that would interfere with the detection of the second inspection pattern are eliminated, thereby maintaining high detection accuracy despite device miniaturization.
Solution Approach 2:
The first inspection pattern is removed in advance before forming the second inspection pattern. This preliminary removal action prevents residual traces from the first inspection pattern from interfering with the detection accuracy of the second inspection pattern, ensuring precise misalignment measurement.
3Productivity
If the first inspection pattern is not removed after ion implantation, then manufacturing time is reduced, but detection accuracy of subsequent inspection patterns is degraded
Solution Approach 1:
The removal of the first inspection pattern and the formation of the second inspection pattern are performed in a continuous sequence without interruption. This continuous process ensures that the first inspection pattern is completely removed before the second inspection pattern is formed, maintaining detection accuracy while minimizing manufacturing time through efficient process sequencing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the detection accuracy of inspection patterns, reduces manufacturing costs, and minimizes the number of inspection patterns required, ultimately reducing the size of semiconductor devices.
Implementation Method 1
the second inspection pattern is larger than the first inspection pattern and covers the entire region where the first inspection pattern was formed
Implementation Method 2
implanting ions into the semiconductor substrate using the first mask layer
Data Source
AI summary
A method of manufacturing a semiconductor device includes forming a reference pattern in an inspection pattern formation region, forming a first mask layer over a semiconductor substrate, while forming a first inspection pattern in the inspection pattern formation region, and measuring a first amount of misalignment of the first inspection pattern with respect to the reference pattern. The method further includes implanting ions into the semiconductor substrate using a first mask layer, removing the first mask layer and the first inspection pattern and then forming a second mask layer over the semiconductor substrate, while forming a second inspection pattern in the inspection pattern formation region, and measuring a second amount of misalignment of the second inspection pattern with respect to the reference pattern. In plan view, the second inspection pattern is larger than the first inspection pattern and covers the entire region where the first inspection pattern is formed.