Semiconductor Storage Device Inter-Layer Insulating Layer Height Stability

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Solution Overview

Problem

Existing semiconductor storage devices face challenges in maintaining consistent height positions of inter-layer insulating layers due to varying heat shrinkage rates, leading to potential fluctuations in the structure's upper surface height across different regions.

Innovation Solution

The semiconductor storage device incorporates a support structure with alternating regions of insulating layers of different diameters, where the outer diameter of one region is greater than the other, to stabilize the inter-layer insulating layers and prevent height fluctuations by adjusting the protrusion amount appropriately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If uniform insulating layers are used throughout the structure, then manufacturing is simpler, but heat shrinkage causes height position fluctuations in the upper surface across different regions

Engineering Contradiction:
Improvesimplicity of insulating layer structureVSAvoidheight position consistency of upper surface
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by differentiating the insulating layer structure between two regions: the first region uses a single insulating layer while the second region uses a stacked structure with multiple insulating layers. This local differentiation compensates for varying heat shrinkage rates in different regions, maintaining height position consistency of the upper surface across the entire device.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the structure is made more complex with additional insulating layers, then height position consistency is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveheight position consistency of upper surfaceVSAvoidcomplexity of insulating layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the insulating layer structure into distinct regions with different configurations. The first region has a simpler single-layer structure while the second region has a more complex multi-layer structure. This segmentation allows each region to be optimized independently for its specific functional requirements while managing overall manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By applying different insulating layer configurations to different regions (first region vs. second region), the patent locally optimizes the structure where needed (second region with stacked layers for height stability) while keeping other regions simpler (first region with single layer), thus balancing precision requirements with manufacturing complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents height position fluctuations and supports the inter-layer insulating layers, ensuring consistent performance and stability across the semiconductor storage device.

Implementation Method 1

varying heat shrinkage rates

Methodology Applied
Scientific EffectHeat shrinkage: Thermal Contraction

Data Source

PatentUS20230092696A1Semiconductor storage device
Publication Date: 2023.03.23 KIOXIA CORP
  • US20230092696A1 patent drawing
  • US20230092696A1 patent drawing
  • US20230092696A1 patent drawing

AI summary

A semiconductor storage device includes conductive layers and inter-layer insulating layers alternately arranged over a substrate having a first region and a second region arranged in a first direction; and a first structure provided in a second region of the substrate. The first structure includes: a plurality of third regions provided at first positions corresponding to at least some of the plurality of conductive layers, respectively, and a plurality of fourth regions provided at second positions corresponding to at least some of the plurality of inter-layer insulating layers, respectively. A first width of the plurality of third regions in the first direction is greater than a second width of the plurality of fourth regions in the first direction.