Semiconductor Device Insulating Layer Segmentation for Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current three-dimensional semiconductor memory devices face challenges in improving operational reliability due to limitations in the structural design and manufacturing methods, which affect the density and performance of memory cell strings.
Innovation Solution
The semiconductor device incorporates a channel layer with alternately arranged first and second parts, surrounded by conductive patterns and cell blocking insulating layers, with a data storage layer that protrudes toward the side walls of the channel layer, formed by alternately stacking material layers and creating undercut regions during manufacturing to enhance electrical field concentration and reduce dispersion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a three-dimensional cell string structure is adopted to increase memory density, then integration level improves, but operational reliability deteriorates due to field dispersion and charge movement between adjacent cells
Solution Approach 1:
The patent divides the insulating layer into multiple segments: cell blocking insulating layers positioned at specific intervals along the channel layer, and dummy blocking insulating layers filling remaining spaces. This segmentation creates isolated regions that prevent charge movement between adjacent memory cells while maintaining high density three-dimensional structure.
Solution Approach 2:
The patent applies different insulating layer configurations at different locations: cell blocking insulating layers are positioned where memory cells are formed to provide electrical isolation, while dummy blocking insulating layers are placed in non-cell regions. This local differentiation optimizes both density and reliability by providing isolation only where needed.
2Ease of manufacture
If conventional insulating layer structures are used in three-dimensional memory, then manufacturing is simpler, but electric field concentration deteriorates leading to poor programming and erasing performance
Solution Approach 1:
The patent forms the cell blocking insulating layers and dummy blocking insulating layers during the manufacturing process before final memory cell formation. This preliminary action creates the necessary electric field concentration structure in advance, ensuring optimal programming and erasing performance without adding complex subsequent processing steps.
3Ease of manufacture
If uniform insulating layers are used between channel layer and conductive patterns, then manufacturing is easier, but charge isolation between adjacent cells deteriorates
Solution Approach 1:
The patent segments the insulating structure into cell blocking insulating layers positioned at specific intervals and dummy blocking insulating layers in between. This segmentation provides charge isolation at critical locations while maintaining manufacturing feasibility through a systematic pattern that can be implemented with standard fabrication processes.
Data Source
AI summary
In an embodiment, the semiconductor device may include interlayer insulating layers, conductive patterns, a channel layer, cell blocking insulating layers, dummy blocking insulating layers, and a data storage layer. The interlayer insulating layers and conductive patterns may be alternately stacked. The channel layer may pass through the interlayer insulating layers and the conductive patterns. The cell blocking insulating layers may be respectively arranged between the channel layer and the conductive patterns. The dummy blocking insulating layers may be respectively arranged between the channel layer and the interlayer insulating layers, and may protrude further toward a side wall of the channel layer than the cell blocking insulating layers. The data storage layer may surround the side wall of the channel layer, and may be formed on a concavo-convex structure defined by the cell blocking insulating layers and the dummy blocking insulating layers.