Semiconductor Insulating Layer Segmentation for Separation
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration density and operation speed while ensuring reliable separation and packaging processes, particularly due to differences in material characteristics between insulating layers which can lead to incomplete cutting or peeling during substrate separation.
Innovation Solution
The semiconductor device incorporates a semiconductor substrate with a lower insulating layer and an upper insulating layer of different thicknesses and materials, featuring a redistribution chip pad that penetrates the upper insulating layer to connect with chip pads, and includes a second opening with a rounded sidewall on the scribe line region to facilitate efficient separation and reduce material remnants during packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single uniform insulating layer is used, then the manufacturing process is simple, but horizontal cracking occurs between insulating layers during separation
Solution Approach 1:
The insulating layer is divided into multiple segments: a first insulating layer and a second insulating layer with different material compositions. This segmentation allows each layer to have optimized properties for its specific function, preventing horizontal cracking during separation while maintaining manufacturing feasibility through sequential deposition processes
Solution Approach 2:
Different regions of the insulating structure use different materials tailored to local requirements. The first insulating layer uses one material composition optimized for adhesion and mechanical strength, while the second insulating layer uses a different material optimized for electrical insulation and planarity, resolving the contradiction between simple structure and reliable separation
2Ease of manufacture
If the insulating layer thickness is uniform, then the fabrication process is straightforward, but incomplete cutting occurs during substrate separation
Solution Approach 1:
The insulating layer is segmented into multiple layers with different thicknesses. The first insulating layer has a greater thickness to ensure complete cutting and separation, while the second insulating layer provides additional insulation. This segmented approach ensures complete cutting during separation while maintaining straightforward fabrication through standard multi-layer deposition techniques
Solution Approach 2:
The solution moves from a single-dimension (uniform thickness) to a multi-dimensional structure with varying thicknesses across different layers. By adding the vertical dimension of layer differentiation, the patent achieves complete cutting through the thicker first layer while maintaining fabrication simplicity through established multi-layer manufacturing processes
3Ease of manufacture
If insulating layers have the same material characteristics, then the structure is homogeneous and easy to manufacture, but peeling occurs during packaging
Solution Approach 1:
Different material compositions are assigned to different insulating layers based on local functional requirements. The first insulating layer uses materials optimized for strong adhesion to prevent peeling, while the second layer uses materials optimized for electrical insulation. This local differentiation eliminates peeling during packaging while maintaining ease of manufacture through standard material deposition processes
Solution Approach 2:
The insulating structure uses composite materials with different properties in each layer. The first insulating layer employs materials with high adhesion characteristics to prevent peeling, while the second insulating layer uses materials with superior electrical insulation properties. This composite approach resolves the contradiction between manufacturing simplicity and layer stability by leveraging the strengths of different materials in their respective positions
Data Source
AI summary
A semiconductor device includes a semiconductor substrate including a chip region and an edge region around the chip region, a lower insulating layer on the semiconductor substrate, a chip pad on the lower insulating layer on the chip region, an upper insulating layer provided on the lower insulating layer to cover the chip pad, the upper and different insulating layers including different materials, and a redistribution chip pad on the chip region and connected to the chip pad. The upper insulating layer includes a first portion on the chip region having a first thickness, a second portion on the edge region having a second thickness, and a third portion on the edge region, the third portion extending from the second portion, spaced from the first portion, and having a decreasing thickness away from the second portion. The second thickness is smaller than the first thickness.