Semiconductor Insulating Pattern Layout for Leakage and Routing Tradeoffs
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Solution Overview
Problem
Existing semiconductor devices face challenges in improving integration, reliability, and electrical characteristics, particularly in managing routing congestion and scaling with power delivery networks.
Innovation Solution
The semiconductor device incorporates a substrate with a channel layer, gate structure, source/drain patterns, and insulating patterns made of different insulating materials, including a sub-insulating pattern and a main insulating pattern, with an insulating liner having varying nitrogen concentrations to enhance reliability and electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single insulating material is used in the insulating pattern, then the manufacturing process is simpler, but the reliability and electrical characteristics are insufficient
Solution Approach 1:
The insulating pattern is segmented into two distinct patterns: a first insulating pattern and a second insulating pattern. Each pattern uses different insulating materials with different etch selectivities, allowing them to be selectively removed or retained during manufacturing processes. This segmentation enables better control over the insulating structure to improve device reliability.
Solution Approach 2:
Different regions of the insulating pattern are assigned different materials based on local requirements. The first insulating material is used in regions where high etch selectivity is needed, while the second insulating material is used in regions where different electrical characteristics are required. This local differentiation optimizes both reliability and electrical performance.
2Productivity
If the insulating pattern penetrates deep into the substrate, then routing congestion is reduced, but leakage currents increase
Solution Approach 1:
The second insulating pattern acts as an intermediary layer between the first insulating pattern and the substrate. It fills the space where the first insulating pattern is removed, providing continuous electrical isolation and preventing leakage currents while maintaining the deep penetration structure needed for routing capacity.
Solution Approach 2:
The insulating pattern uses a composite structure with two different insulating materials. The first insulating material provides high etch selectivity for process control, while the second insulating material provides excellent electrical isolation properties. This composite approach simultaneously achieves deep penetration for routing and prevents leakage currents.
3Manufacturing precision
If etching is performed to form the insulating pattern, then the insulating structure is created, but other insulating layers may be damaged
Solution Approach 1:
The insulating pattern is divided into two segments with different materials that have different etch selectivities. This allows selective etching processes to remove or modify one insulating pattern while leaving the other intact, preventing damage to other insulating layers and improving manufacturing precision.
Solution Approach 2:
The etching process parameters can be adjusted to exploit the different etch selectivities of the two insulating materials. By changing etch chemistry, power, pressure, or other parameters, the process can be tuned to etch one material while preserving the other, ensuring manufacturing precision without damaging other layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the reliability and electrical performance of semiconductor devices by reducing leakage currents and enhancing the integrity of insulating layers, thereby improving overall device functionality.
Implementation Method 1
at least a portion of the insulating pattern disposed between two source/drain patterns may be formed through a nitridation process
Implementation Method 2
the insulating liner has a lower nitrogen concentration as it gets farther from the side surface of the through electrode toward the lower pattern
Implementation Method 3
the sub-insulating pattern and the main insulating pattern include different insulating materials
Data Source
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AI summary
An example semiconductor device includes a substrate (10), a channel layer (CH) disposed on the substrate (10), a gate structure (GS) surrounding the channel layer (CH), source/drain patterns connected with both sides of the channel layer (CH), a lower wiring structure (410) disposed below the substrate (10), and an insulating pattern extending through the substrate (10) and disposed between the source/drain patterns below the gate structure (GS). The insulating pattern includes a sub-insulating pattern (211) disposed below the gate structure (GS) and a main insulating pattern (212) disposed between the sub-insulating pattern (211) and the lower wiring structure (410). The sub-insulating pattern (211) and the main insulating pattern (212) include different insulating materials.