Semiconductor Insulating Voids for Breakdown Voltage
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving improved breakdown voltage, particularly due to electric field concentration at the pn junction plane, which affects the device's performance and reliability.
Innovation Solution
Incorporating an insulating portion with voids around the semiconductor regions, which expands the pn junction plane and reduces electric field concentration by altering the equipotential line bending, thereby enhancing breakdown voltage. This is achieved through a manufacturing process involving multiple insulating layers and void formations using techniques like thermal oxidation and chemical vapor deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulating portion is provided in the vicinity of a semiconductor region to improve breakdown voltage, then breakdown voltage is improved, but electric field concentration occurs at the pn junction plane
Solution Approach 1:
The insulating portion is configured to include a plurality of voids (first voids and second voids) that extend around the semiconductor regions. This porous structure with multiple voids distributed throughout the insulating portion reduces electric field concentration by providing multiple discharge paths and preventing field accumulation at single points, while maintaining the insulating function to improve breakdown voltage.
Solution Approach 2:
The insulating portion has non-uniform structure with different regions containing different patterns of voids. The first voids extend around the first semiconductor region while the second voids extend around the second semiconductor region, creating locally optimized electric field distribution in different areas to simultaneously improve breakdown voltage and reduce electric field concentration.
2Reliability
If the insulating portion is made thicker to enhance breakdown voltage, then breakdown voltage is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The insulating portion is segmented into multiple regions with different void structures - first voids around the first semiconductor region and second voids around the second semiconductor region. This segmentation allows the thick insulating portion to be manufactured through separate processing steps for different regions, making the complex thick insulator fabrication more manageable and controllable.
Solution Approach 2:
The voids are nested within the insulating portion structure, with first voids and second voids embedded at different locations and depths. This nesting approach allows the thick insulating portion to incorporate multiple functional elements (different void patterns) in a hierarchical manner, managing manufacturing complexity by organizing the structure in nested layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses electric field concentration and improves breakdown voltage by expanding the pn junction plane and reducing equipotential line bending, facilitating the formation of a thicker insulating portion for enhanced semiconductor device performance.
Implementation Method 1
electric field concentration at the pn junction plane
Implementation Method 2
reduces electric field concentration by altering the equipotential line bending
Implementation Method 3
thermal oxidation
Implementation Method 4
chemical vapor deposition
Data Source
AI summary
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a third semiconductor region of the second conductivity type, and an insulating portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The insulating portion is located in a vicinity of, and contacts, the second semiconductor region and the third semiconductor region, and the insulating portion includes a plurality of voids therein, the plurality of voids extending around the second semiconductor region.