Semiconductor Insulation Structure for Corrosion Prevention
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Solution Overview
Problem
Conventional BGA-type semiconductor devices face issues with reduced dielectric strength and moisture infiltration due to insufficient insulation coverage, particularly in the manufacturing process where the thickness of the second insulation film is compromised, leading to potential corrosion of the first wiring.
Innovation Solution
A semiconductor device manufacturing method involving a semiconductor substrate with a hole penetrating through its thickness, where a first insulation film is formed on the front surface, and a second insulation film is applied on the sidewall and back surface of the substrate, with a second wiring connected to the first wiring through the openings, ensuring adequate coverage and dielectric strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the thickness of the second insulation film is reduced to expose the first wiring, then the manufacturing process can proceed, but the dielectric strength is compromised and moisture infiltration occurs
Solution Approach 1:
The patent applies different insulation strategies to different regions: the first insulation film covers the front surface wiring areas, while the second insulation film covers the back surface and sidewalls. This localized differentiation allows the first wiring to be exposed on the front surface for electrical connection while maintaining insulation coverage on the back surface and sidewalls to prevent moisture infiltration and maintain dielectric strength.
Solution Approach 2:
The patent transitions from a single-layer insulation approach to a multi-dimensional insulation structure by adding the second insulation film on the back surface and sidewalls. This dimensional extension provides insulation coverage from multiple angles, preventing moisture infiltration paths that would exist with only a single front-surface insulation layer.
2Ease of operation
If the second insulation film thickness is reduced to enable wiring exposure, then electrical connection can be established, but corrosion resistance deteriorates due to chemical infiltration
Solution Approach 1:
The patent selectively exposes the first wiring on the front surface by removing or thinning the first insulation film only in necessary areas, while maintaining the second insulation film on the back surface and sidewalls. This localized insulation strategy enables electrical connection where needed while preserving corrosion resistance in areas exposed to chemicals during manufacturing and operation.
Solution Approach 2:
The second insulation film is applied in advance to cover the back surface and sidewalls before chemical processing steps occur. This preliminary protective layer prevents chemical infiltration and corrosion during manufacturing processes such as etching and cleaning, and provides ongoing protection during device operation.
3Device complexity
If insulation coverage is insufficient in the manufacturing process, then manufacturing complexity is reduced, but moisture infiltration increases leading to device failure
Solution Approach 1:
The patent implements insulation coverage strategically rather than uniformly: the first insulation film handles front surface wiring isolation, while the second insulation film specifically addresses back surface and sidewall protection. This localized quality approach ensures moisture resistance at critical interfaces without requiring excessive insulation material or complex multi-layer structures throughout the entire device.
Solution Approach 2:
The patent uses a composite insulation structure combining two different insulation films with potentially different material properties and functions. The first insulation film may be optimized for front surface electrical isolation, while the second insulation film is optimized for back surface and sidewall moisture barrier performance, creating a composite system that addresses multiple requirements simultaneously.
Data Source
AI summary
The invention is directed to prevent corrosion of a semiconductor device. In the semiconductor device manufacturing method of the invention, a semiconductor substrate is etched from its back surface in a position corresponding to a first wiring formed on the semiconductor substrate with a first insulation film therebetween, to form a first opening exposing the first insulation film. Next, the insulation film exposed in the first opening is etched to form a second opening exposing the first wiring, and then the semiconductor substrate is etched to increase a diameter of the first opening and form a first opening having the larger diameter. Then, a second insulation film is formed on the back surface of the semiconductor substrate including on the first wiring through the first and second openings, and then the second insulation film covering the first wiring is etched.