Semiconductor Interlayer Insulation with Localized High Dielectric Constant

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Solution Overview

Problem

Increasing the dielectric constant of interlayer insulation films in semiconductor devices to prevent creeping discharge leads to an increase in wiring volume, particularly affecting the switching characteristics of MOSFETs.

Innovation Solution

A semiconductor device design where the interlayer insulation film has a high dielectric constant film only in the termination insulation portion, not in the element insulation portion, to prevent creeping discharge while maintaining the wiring volume in the element insulation portion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the dielectric constant of the interlayer insulation film is increased to suppress creeping discharge, then creeping discharge is prevented, but the wiring volume increases

Engineering Contradiction:
Improvecreeping discharge suppressionVSAvoidwiring volume
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The interlayer insulation film is designed with spatially varying dielectric constants: a first region with dielectric constant ≥20 (for creeping discharge suppression) and a second region with dielectric constant <20 (for maintaining small wiring volume). This local differentiation allows each region to optimize for its specific functional requirement.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interlayer insulation film is segmented into functionally distinct regions: a termination region (first region) covering the termination portion with high dielectric constant, and an element region (second region) covering the element portion with low dielectric constant. This segmentation enables independent optimization of each region's properties.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the dielectric constant of the interlayer insulation film is increased, then creeping discharge is suppressed, but the capacitance between source wiring and gate electrode increases, deteriorating switching characteristics

Engineering Contradiction:
Improvecreeping discharge suppressionVSAvoidswitching characteristics
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The dielectric constant is locally optimized: high dielectric constant (≥20) in the termination region to suppress creeping discharge, and low dielectric constant (<20) in the element region to minimize capacitance between source wiring and gate electrode, thereby preserving switching characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interlayer insulation film is divided into a termination region with high dielectric constant for reliability and an element region with low dielectric constant for performance, allowing simultaneous achievement of creeping discharge suppression and good switching characteristics.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively suppresses creeping discharge on the termination insulation portion without increasing the wiring volume in the element insulation portion, thereby maintaining the switching characteristics of the semiconductor device.

Implementation Method 1

creeping discharge resulting from electric field concentration at the termination portion surrounding element portion on a semiconductor substrate. Therefore, countermeasures against creeping discharge are particularly required when a wide band gap semiconductor is used. Creeping discharge can be suppressed by increasing a dielectric constant of an interlayer insulation film.

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS9570543B2Semiconductor device
Publication Date: 2017.02.14 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US9570543B2 patent drawing
  • US9570543B2 patent drawing
  • US9570543B2 patent drawing

AI summary

A semiconductor substrate has an element portion and a termination portion located on an outer side of the element portion. A first electrode layer is provided on a first surface of the semiconductor substrate. A second electrode layer is provided on a second surface of the semiconductor substrate in an upper portion of the element portion. An interlayer insulation film is provided on the second surface of the semiconductor substrate. The interlayer insulation film has: an element insulation portion that provides insulation between a part of the element portion of the semiconductor substrate and the second electrode layer; and a termination insulation portion covering a termination portion of the semiconductor substrate. The termination insulation portion includes a high dielectric constant film that is higher in dielectric constant than the element insulation portion.