Semiconductor Device Insulation Layer with Partial Semiconductor Ring
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Solution Overview
Problem
Semiconductor devices face insulation breakdown due to high electric field strength at the edges of active regions, where the depletion layer is narrow, and excessive movable ions in the insulation layer further deteriorate the dielectric strength.
Innovation Solution
A semiconductor layer with a surface density of impurities lower than the RESURF condition is integrated into the insulation layer, overlapping partially with the inter-ring region between field limiting rings, allowing the depletion layer to expand and reduce electric field strength, while trapping movable ions to prevent insulation breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a plurality of FLRs with small width is provided to enhance dielectric strength, then dielectric strength is improved, but the distance between adjacent FLRs cannot be too small which limits further enhancement
Solution Approach 1:
The invention introduces a semiconductor layer in the vertical dimension above the inter-ring region between adjacent FLRs. This third-dimensional approach allows the depletion layer to expand vertically into the semiconductor layer, effectively increasing the insulation zone width without reducing the horizontal distance between FLRs, thus resolving the contradiction between enhancing dielectric strength and maintaining adequate spacing.
Solution Approach 2:
The invention creates a composite structure by integrating a semiconductor layer with specific impurity concentration into the insulation layer. This composite material approach combines the insulating properties of the base insulation layer with the electric field modulation capabilities of the semiconductor layer, achieving enhanced dielectric strength through material composition rather than geometric modification alone.
2Reliability
If a conductive layer or semiconductor layer is provided in the insulation layer to trap movable ions, then insulation layer deterioration is reduced, but the width of the area where electric field can be formed decreases
Solution Approach 1:
The invention applies local quality by creating a semiconductor layer with specifically controlled impurity concentration only in the inter-ring region between adjacent FLRs, while maintaining the insulation layer's original properties in other areas. This localized modification allows movable ion trapping where needed without compromising the overall electric field formation area.
Solution Approach 2:
The invention changes the impurity concentration parameter of the semiconductor layer to be lower than the RESURF condition, which enables the depletion layer to expand into this region under high voltage conditions. This parameter change allows the semiconductor layer to function as both a movable ion trap and an extension of the electric field formation area, resolving the contradiction between these two functions.
3Reliability
If the insulation zone width is increased to reduce electric field strength, then dielectric strength is enhanced, but the distance between adjacent FLRs must be larger which increases device area
Solution Approach 1:
The invention resolves this contradiction by extending the insulation zone into the vertical dimension through the semiconductor layer. The depletion layer can expand vertically into this third dimension, effectively increasing the insulation zone volume and reducing electric field strength without requiring increased horizontal spacing between FLRs, thus maintaining compact device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances dielectric strength by mitigating electric field strength increases and reducing the likelihood of insulation breakdown, effectively improving the semiconductor device's reliability.
Implementation Method 1
When using a semiconductor substrate of an N-type, for example, P-type impurities are provided in a ring shape surrounding an active region for doping, so that a P-type FLR is formed. When the FLR is provided, a depletion layer is formed and extends at the p-n junction between the FLR and the semiconductor substrate
Implementation Method 2
The semiconductor layer contains activated impurities at a surface density (concentration) lower than a surface density (concentration) that satisfies a RESURF condition. The impurities are substances, typically boron or phosphorus, that determine the type of a semiconductor
Implementation Method 3
In the semiconductor layer, carriers capture the movable ions. However, the conductive layer or the semiconductor layer cannot be simply provided between adjacent FLRs because, as mentioned above, an insulation zone between adjacent FLRs needs to have a certain width
Data Source
AI summary
Provided is a semiconductor device in which movable ions in an insulation layer on a main surface are reduced and dielectric strength is enhanced. A semiconductor device has a plurality of FLRs, an insulation layer, and a semiconductor layer. The plurality of FLRs surrounds, in a plan view of a substrate, an active region in which an element is formed. The insulation layer is provided on the main surface of the semiconductor device and covers the plurality of FLRs. The semiconductor layer is provided in the insulation layer and surrounds the active region in parallel to the FLRs. The semiconductor layer contains impurities at a surface density lower than a surface density that satisfies a RESURF condition. In the plan view, the semiconductor layer overlaps with a part of the region (an inter-ring region) between adjacent FLRs and does not overlap with rest of the inter-ring region.