Semiconductor Insulation Pattern for DRAM Peripheral Circuit Protection

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Solution Overview

Problem

In semiconductor device manufacturing, particularly for DRAM devices, the formation of capacitors is challenging due to the risk of damaging peripheral circuit structures as device sizes decrease, leading to potential failures during capacitor formation.

Innovation Solution

A semiconductor device design incorporating a gate structure, insulating interlayer, capping layer, wiring, insulation pattern, and etch stop layer, where the insulation pattern has a thicker lower portion and thinner lateral portion, effectively preventing the collapse of insulating interlayers and protecting peripheral circuit structures during fabrication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the size of the DRAM device is decreased, then the integration density is improved, but the risk of damaging peripheral circuit structures during capacitor formation increases

Engineering Contradiction:
Improvedevice sizeVSAvoidintegrity of peripheral circuit structures
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The insulation pattern is formed in advance before capacitor formation processes, creating a protective structure that prevents damage to peripheral circuit structures during subsequent capacitor formation steps. This preliminary protective measure allows for reduced device size while maintaining peripheral circuit integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulation pattern acts as an intermediary protective layer between the capacitor formation process and the peripheral circuit structures. It absorbs or prevents damage during capacitor formation, allowing smaller device dimensions without compromising peripheral circuit integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the thickness of the lateral portion of the insulation pattern is increased, then the protection of peripheral circuit structures is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improveprotection of peripheral circuit structuresVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulation pattern has different thicknesses in different regions: a first thickness for the lower portion and a second (smaller) thickness for the lateral portion. This local variation provides adequate protection where needed while reducing manufacturing complexity and material usage in other areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thickness parameter of the insulation pattern is varied spatially - thicker at the bottom for protection and thinner at the lateral portions for ease of manufacture. This parameter change resolves the contradiction between protection effectiveness and manufacturing simplicity.

Inventive Principle:
Principle #35Parameter changes

3Area of moving object

If the insulating interlayer is made thinner to reduce device size, then the integration density is improved, but the risk of collapse during fabrication increases

Engineering Contradiction:
Improvedevice sizeVSAvoidstability of insulating interlayer
Core Design Contradiction:
Area of moving objectVSStability of the object's composition

Solution Approach 1:

The insulation pattern is formed preliminarily to provide structural support before and during the fabrication of the insulating interlayer. This preliminary support structure prevents collapse of thinner insulating interlayers, enabling reduced device size while maintaining stability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulation pattern serves as an intermediary support structure that stabilizes the insulating interlayer during fabrication. It prevents collapse by providing mechanical support, allowing the insulating interlayer to be made thinner for higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230135110A1Semiconductor devices
Publication Date: 2023.05.04 SAMSUNG ELECTRONICS CO LTD
  • US20230135110A1 patent drawing
  • US20230135110A1 patent drawing
  • US20230135110A1 patent drawing

AI summary

A semiconductor device includes a gate structure on a substrate, an insulating interlayer on the substrate and covering a sidewall of the gate structure, a capping layer on the gate structure and the insulating interlayer, a wiring on the capping layer, an insulation pattern on a bottom and a sidewall of an opening extending through the wiring and at least an upper portion of the capping layer, and an etch stop layer on the insulation pattern and the wiring. The insulation pattern includes a lower portion on the bottom of the opening and a lateral portion contacting the sidewall of the opening. A thickness of the lower portion of the insulation pattern from the bottom of the opening in a vertical direction is greater than a thickness of the lateral portion of the insulation pattern from the sidewall of the opening in a horizontal direction.