Semiconductor Device Insulation Spacer Design

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Solution Overview

Problem

In semiconductor devices, the exposure of the semiconductor surface during die-bonding can lead to short-circuiting with the conductive substrate due to potential distribution and discharge when a high voltage is applied, limiting the reverse blocking capability.

Innovation Solution

A semiconductor device configuration that includes a semiconductor chip with a conductive spacer having a smaller planar area than the first electrode, which supports the chip on the substrate and prevents excessive bonding material spread, along with a resin package that seals the chip and spacer, ensuring insulation and preventing short-circuiting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the semiconductor surface is exposed during die-bonding to enable mounting, then the device can be assembled, but short-circuiting may occur between the semiconductor layer and conductive substrate due to potential distribution and discharge

Engineering Contradiction:
Improvemounting capabilityVSAvoidinsulation between semiconductor layer and substrate
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A conductive spacer is introduced as an intermediary component between the semiconductor chip and the conductive substrate. The spacer has a planar area smaller than the first electrode, creating a physical barrier that maintains insulation distance and prevents discharge paths while allowing the semiconductor surface to remain exposed for mounting operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution transitions from a two-dimensional bonding surface problem to a three-dimensional structure by adding vertical height through the conductive spacer. This creates additional insulation distance in the vertical dimension while maintaining the exposed semiconductor surface for horizontal mounting operations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Strength

If bonding material is applied to bond the semiconductor chip to the substrate, then mechanical bonding is achieved, but the bonding material may spread and cause short-circuiting between the semiconductor layer and conductive substrate

Engineering Contradiction:
Improvebonding strengthVSAvoidinsulation distance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The conductive spacer acts as a mediator that physically restricts the lateral spread of bonding material. By providing a raised structure with smaller planar area than the first electrode, it creates a containment effect that prevents bonding material from reaching the semiconductor layer while maintaining adequate bonding strength.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conductive spacer is pre-formed on the conductive substrate before bonding material application. This preliminary structure establishes the insulation barrier in advance, guiding the bonding material to spread only within safe boundaries and preventing short-circuiting before it can occur.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10832922B2Semiconductor device
Publication Date: 2020.11.10 ROHM CO LTD
  • US10832922B2 patent drawing
  • US10832922B2 patent drawing
  • US10832922B2 patent drawing

AI summary

A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.