Semiconductor Apparatus Insulator Depth for Substrate Integrity
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Solution Overview
Problem
The existing semiconductor manufacturing processes using deep trench isolation (DTI) around openings for external connection electrodes often result in defects or cracks in the semiconductor substrate, leading to reduced fabrication yield due to foreign material contamination.
Innovation Solution
A semiconductor apparatus and manufacturing method where an insulator portion is strategically placed around openings in the semiconductor layer, with a semiconductor region of opposite conductivity type extending from the insulator portion to the second face, ensuring insulation without reaching the second face, thereby preventing stress concentration and substrate damage during thinning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulating structure formed of deep trench isolation (DTI) is provided around an opening that penetrates a semiconductor substrate, then insulating performance between lead wiring and internal element is ensured, but defects or cracks occur in the semiconductor substrate near the insulating structure
Solution Approach 1:
The patent changes the depth parameter of the trench isolation from extending to the back surface (conventional DTI) to stopping at an intermediate depth that does not reach the back surface. This parameter modification maintains the insulating function while eliminating the stress concentration that causes substrate defects and cracks.
Solution Approach 2:
The patent introduces a buffer region between the trench isolation and the back surface of the substrate. This buffer zone acts as a stress relief area that prevents stress concentration from propagating to the back surface, thereby preventing defects and cracks before they occur.
2Reliability
If deep trench isolation is used to ensure insulating state, then electrical insulation is maintained, but fabrication yield is significantly reduced due to foreign material caused by defects or cracks
Solution Approach 1:
By modifying the depth parameter of the trench isolation to stop at an intermediate depth rather than extending to the back surface, the patent eliminates the root cause of substrate defects. This change maintains electrical insulation performance while preventing foreign material contamination, thereby improving fabrication yield.
3Reliability
If the insulator portion extends deeper into the semiconductor layer, then insulating performance is improved, but stress concentration and substrate damage increase
Solution Approach 1:
The patent optimizes the depth parameter of the insulator portion to an intermediate value that does not reach the back surface. This parameter optimization achieves the necessary insulating performance while avoiding excessive stress concentration that would compromise substrate strength and cause mechanical damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains insulation performance for external connection electrodes without reducing fabrication yield by preventing defects and cracks in the semiconductor layer, ensuring reliable electrical insulation and mechanical integrity.
Implementation Method 1
an insulator portion arranged in a trench of the semiconductor layer... ensures insulating performance
Implementation Method 2
preventing stress concentration and substrate damage during thinning
Data Source
AI summary
A semiconductor apparatus includes a semiconductor layer having first and second faces, a semiconductor element portion in which semiconductor elements are provided, and openings each penetrating the semiconductor layer from the second face side, an interconnection structure provided on the first face side, and an insulator portion provided to surround at least one of the openings within a virtual plane along the second face and extend to a depth between T/2 and T from the first face, where T is the thickness of the semiconductor layer. The semiconductor layer includes a semiconductor region of one conductivity type provided on the opposite side to the one opening to the insulator portion within the virtual plane, and a semiconductor region of another conductivity type provided in the semiconductor layer from the insulator portion face on the second face side to the second face in a direction perpendicular to the second face.