Semiconductor Integrated Circuit Sleep Mode Data Handling

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Solution Overview

Problem

The existing semiconductor integrated circuits face challenges in accurately reading external data during a sleep mode due to prolonged inactivity, where the CPU is stopped or slowed down, leading to delayed response times and potential misreading of status data changes.

Innovation Solution

Incorporating an edge detection unit to detect interrupt signals and a data holding unit to store external data, allowing the CPU to read the held data upon returning to active mode, ensuring accurate data reading despite sleep mode operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the fuel gauge IC enters sleep mode to reduce consumption current, then power consumption is reduced, but the response time to read external data increases and data accuracy deteriorates

Engineering Contradiction:
Improveconsumption currentVSAvoidresponse time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having the data holding unit capture and hold external data at the moment an interrupt signal is detected, even before the CPU wakes up from sleep mode. This ensures that when the CPU becomes active, the data is already preserved and ready for immediate reading, thus reducing the effective response time while maintaining low power consumption during sleep.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the CPU operates at high speed in active mode, then processing speed is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by alternating between sleep mode (low power consumption) and active mode (high processing speed) based on interrupt signals. The system remains in sleep mode during normal operation to conserve power, and only transitions to active mode when an interrupt signal indicates external data needs to be read, thus optimizing the balance between speed and power consumption.

Inventive Principle:
Principle #19Periodic action

3Loss of time

If the CPU reads external data during sleep mode, then response time is improved, but data accuracy deteriorates due to potential data changes during the reading period

Engineering Contradiction:
Improveresponse timeVSAvoiddata accuracy
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies preliminary action by capturing the external data at the exact moment the interrupt signal is detected, before the CPU wakes up. The data holding unit preserves this snapshot of the data, ensuring that even if the external data changes after the interrupt occurs, the CPU will read the accurate data state that existed when the interrupt was triggered, thus maintaining data accuracy while enabling timely response.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9274583B2Semiconductor integrated circuit
Publication Date: 2016.03.01 MITSUMI ELECTRIC CO LTD
  • US9274583B2 patent drawing
  • US9274583B2 patent drawing
  • US9274583B2 patent drawing

AI summary

A semiconductor integrated circuit includes a central processing unit 21 the operation of which is stopped or slowed down in a sleep mode; an edge detection unit 23 detecting an edge of an interrupt signal supplied from the outside and generating an edge detection signal; and a data holding unit 22 holding data supplied from the outside when the edge detection signal is received. The central processing unit 21 reads the data held by the data holding unit 22 after returning from the sleep mode to an active mode in response to the interrupt signal.