Semiconductor Interconnect Structure for Suppressing Anneal Diffusion

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Solution Overview

Problem

In semiconductor device manufacturing, the diffusion of metal atoms from a barrier metal layer into an interconnect material layer during annealing leads to increased electric resistance and potential defects, such as void formation and elemental distribution issues.

Innovation Solution

Incorporating a region with a high concentration of impurity elements between the barrier metal layer and the interconnect material layer, formed through specific plating treatment periods with varying electric current values, to suppress metal atom diffusion and maintain low electric resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If annealing is performed to form an interconnect structure, then metal bonding and layer formation are achieved, but metal atoms diffuse from the barrier metal layer into the interconnect material layer causing increased electric resistance

Engineering Contradiction:
Improvebonding qualityVSAvoidelemental distribution control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A third element is introduced into the interconnect material layer before the annealing process to preemptively prevent metal atom diffusion. This preliminary action creates a diffusion barrier that stops the harmful diffusion process before it can significantly increase electric resistance, while still allowing the annealing to achieve proper metal bonding.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The third element acts as an intermediary substance between the barrier metal layer and the interconnect material layer. During annealing, this intermediate layer absorbs or blocks the diffusing metal atoms, preventing them from reaching and contaminating the interconnect material, thus maintaining low electric resistance while still permitting necessary atomic diffusion for bonding.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If barrier metal layer is used to prevent diffusion, then metal atom diffusion is reduced, but void formation and elemental distribution issues occur

Engineering Contradiction:
Improvediffusion preventionVSAvoiddefect formation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

Instead of using a complete barrier metal layer that causes uniform diffusion prevention and void formation, the invention applies diffusion prevention locally by introducing the third element specifically at the interface region where diffusion occurs. This localized approach prevents metal atom diffusion exactly where needed without creating the widespread void formation associated with complete barrier layers.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes the chemical composition parameter of the interconnect material layer by adding a third element, transforming it from a simple metal layer to a composite material with enhanced diffusion resistance. This parameter change enables diffusion prevention without requiring a separate barrier metal layer, thereby avoiding the void formation issues that arise from incomplete barrier layer coverage.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If plating treatment is performed to form interconnect material layer, then conductive material is deposited, but metal atoms diffuse into the layer during subsequent annealing increasing electric resistance

Engineering Contradiction:
Improvelayer formationVSAvoidelectric resistance control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The third element is introduced into the interconnect material layer during or immediately after the plating treatment, before the annealing process begins. This preliminary incorporation of the diffusion-preventing element ensures that when annealing occurs, the metal atoms from the barrier layer are blocked from diffusing into the freshly deposited interconnect material, maintaining low electric resistance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention creates a composite interconnect material layer by combining the plated conductive material with a third element that has diffusion-resistant properties. This composite structure maintains the electrical conductivity needed for interconnect function while adding diffusion prevention capabilities, allowing the layer to withstand subsequent annealing without significant electric resistance increase.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents metal atom diffusion, maintaining low electric resistance and reducing defects by creating a region with a higher impurity element concentration, thereby enhancing the semiconductor device's performance.

Implementation Method 1

a plating treatment is performed on the barrier metal layer in a plating solution containing an element Q as an impurity element

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 2

atoms in a layer are diffused into another layer. For example, metal atoms in a barrier metal layer may be diffused into an interconnect material layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20240421083A1Semiconductor device and method of manufacturing the same
Publication Date: 2024.12.19 KIOXIA CORP
  • US20240421083A1 patent drawing
  • US20240421083A1 patent drawing
  • US20240421083A1 patent drawing

AI summary

In one embodiment, a semiconductor device includes a first insulator, and a first interconnect including a first layer that is provided on side and upper faces of the first insulator in the first insulator, and includes a first element as a metal element, and a second layer that is provided on side and upper faces of the first layer in the first insulator, and includes a second element as a metal element different from the first element, and a third element different from the first and second elements. The second layer includes a first portion, an intermediate region, and a second portion that are provided on the side face of the first layer in order. A concentration of the third element in the intermediate region is higher than that of the third element in the first portion, and that of the third element in the second portion.