Semiconductor Interconnect Barrier Layers for Copper Diffusion Control
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Solution Overview
Problem
The increasing density of semiconductor devices requires more metallic layers, leading to higher manufacturing costs and signaling resistance due to the difficulty in etching copper interconnects and copper diffusion into dielectric layers, which is exacerbated by the use of high-k encapsulation layers that increase capacitive coupling and k values.
Innovation Solution
A metal interconnect structure with a conductive line surrounded by barrier layers and a local dielectric or metal barrier on the top surface, using non-porous low-k dielectric materials and selective etching techniques to prevent copper diffusion and maintain low-k properties, and employing electrochemical mechanical planarization to form a planar surface without damaging the dielectric.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If copper interconnects are used to reduce line resistance, then signaling speed is improved, but copper diffusion into the interlevel dielectric occurs
Solution Approach 1:
A barrier layer is introduced as an intermediary material between the copper interconnect and the interlevel dielectric. This barrier layer prevents copper atoms from diffusing into the dielectric while allowing the copper to maintain its low-resistance electrical connection function.
Solution Approach 2:
The barrier layer is deposited on the copper surface before the interlevel dielectric is formed, preemptively preventing copper diffusion into the dielectric. This preliminary protective action stops the harmful diffusion process before it can occur.
2Object-generated harmful factors
If a dielectric layer is deposited over copper interconnect to prevent diffusion, then copper diffusion is prevented, but the effective k value increases and capacitive coupling increases
Solution Approach 1:
Instead of depositing a global dielectric layer over the entire copper surface, the invention applies the dielectric layer selectively only in regions where diffusion prevention is needed, while leaving other regions exposed or treated differently. This local approach maintains low-k properties in critical areas while still preventing copper diffusion where necessary.
3Area of stationary object
If the width-height product of interconnect wiring is reduced to accommodate higher density, then chip area is reduced, but line resistance increases
Solution Approach 1:
The invention changes the material parameters of the interconnect by using copper instead of aluminum, and introduces barrier layers with specific electrical properties. These parameter changes allow for reduced wire dimensions while maintaining acceptable resistance levels through the superior conductivity of copper and the controlled interface properties of the barrier layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the effective k value of the dielectric, minimizing capacitive coupling and maintaining low-k properties while preventing copper diffusion, thus improving signaling speed and reducing manufacturing costs.
Implementation Method 1
barrier materials are used to surround the copper to prevent diffusion
Implementation Method 2
employing electrochemical mechanical planarization to form a planar surface without damaging the dielectric
Data Source
AI summary
An integrated circuit interconnect structure includes a conductive line, a first barrier layer disposed on a bottom surface of conductive line, a second barrier layer disposed on the top surface of the conductive line, and an interlevel dielectric surrounding the conductive line.