Semiconductor Interconnect Structure Eliminating Cavities

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional semiconductor interconnect structures face reliability issues due to the formation of cavities between metal and dielectric layers, which are caused by the undercutting effect during the wet etching process, leading to reduced inter-layer connection reliability.

Innovation Solution

A method and structure for manufacturing semiconductor interconnects involving a substrate with a first metal layer, a dielectric layer, and a hard mask layer, where the hard mask layer is removed using a wet etching method, followed by selectively depositing a second metal layer at the bottom of the hole and a third metal layer that fills the hole, with optional barrier and crystallized layers, and planarization to ensure even surfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wet etching method is used to remove hard mask layer, then hard mask layer can be effectively removed, but undercutting effect occurs causing cavity formation that reduces inter-layer connection reliability

Engineering Contradiction:

Improvehard mask layer removalVSAvoidinter-layer connection reliability

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

A second metal layer is deposited at the bottom of the hole before filling with the third metal layer. This preliminary action ensures that the undercut area is filled with metal material before the final filling process, preventing cavity formation and ensuring complete metal-to-metal contact for reliable inter-layer connection.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The second metal layer acts as an intermediary material that fills the undercut region created by wet etching. This intermediate layer provides a bridge between the first metal layer and the third metal layer, ensuring continuous metal contact and eliminating cavities that would otherwise form in the undercut area.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If conventional single-layer filling method is used, then manufacturing process is simple, but cavities form in undercut areas reducing structural integrity

Engineering Contradiction:

Improvemanufacturing process complexityVSAvoidhole filling completeness

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The hole filling process is segmented into two distinct steps: first depositing a second metal layer at the bottom of the hole to fill the undercut area, then depositing a third metal layer to complete the hole filling. This segmentation ensures complete filling without cavities while maintaining manageable process complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The second metal layer is deposited as a preliminary action before the final hole filling with the third metal layer. This preliminary deposition ensures that the difficult-to-fill undercut region is addressed first, guaranteeing complete filling and structural integrity before the main filling operation.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach eliminates cavities and enhances the reliability of inter-layer connections by ensuring complete filling of the undercut areas, thereby improving the structural integrity of semiconductor interconnects.

Implementation Method 1

the hard mask layer may be removed by a wet etching method

Methodology Applied

Scientific EffectWet etching:

Implementation Method 2

the wet etching method may use one or more of the following agents as etching agent: hydrogen peroxide, diluted hydrofluoric acid, sulfuric acid, hydrochloric acid, and ammonium hydroxide

Methodology Applied

Scientific EffectChemical etching:

Implementation Method 3

selectively depositing a second metal layer at the bottom of the hole; and depositing a third metal layer

Methodology Applied

Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 4

selectively depositing a second metal layer at the bottom of the hole; and depositing a third metal layer

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 5

the barrier layer may be made of tantalum nitride (TaN), tantalum (Ta), or a multi-layer structure comprising tantalum nitride (TaN) and tantalum (Ta)

Methodology Applied

Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS11069565B2Semiconductor interconnect structure and manufacturing method thereof

Publication Date: 2021.07.20 SEMICON MFG INT (BEIJING) CORP

AI summary

A semiconductor interconnect structure and its manufacturing method are presented. The manufacturing method includes:providing a substrate structure, wherein the substrate structure comprises:a substrate;a first metal layer on the substrate;a dielectric layer on the substrate, wherein the dielectric layer covers the first metal layer, and wherein the dielectric layer has a hole extending to the first metal layer; anda hard mask layer on the dielectric layer;removing the hard mask layer on the dielectric layer;selectively depositing a second metal layer at the bottom of the hole; anddepositing a third metal layer, wherein the third metal layer fills the hole.This semiconductor interconnect structure provides improved reliability over conventional structures.