Semiconductor Interconnect Cleaning for Low Contact Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing interconnect structures in semiconductor devices face issues with high contact resistance due to native metal oxide layers formed on gate electrodes and source/drain contact structures, which hinder effective electrical connections and device performance.

Innovation Solution

A cleaning process using a fluorine-containing acid or gas is employed to remove native metal oxide layers, ensuring a clean interface between contact structures and electrodes, thereby reducing contact resistance and enhancing device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple layers of interconnect structures are formed to increase device density, then device functionality and integration are improved, but contact resistance between layers increases and electrical connection reliability deteriorates

Engineering Contradiction:
Improvedevice integrationVSAvoidelectrical connection
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A cleaning process is performed before depositing the conductive layer to remove native metal oxide layers from the gate electrode surface. This preliminary cleaning action ensures that the subsequent conductive layer forms a clean interface with the gate electrode, reducing contact resistance and improving electrical connection reliability in multi-layer interconnect structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the surface chemical state of the gate electrode by removing the native metal oxide layer through fluorine-containing acid or gas treatment. This parameter change in surface composition and cleanliness enables better electrical contact with the conductive interconnect layer, resolving the reliability issue while maintaining device integration benefits.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If native metal oxide layers are left on gate electrodes to simplify the manufacturing process, then manufacturing complexity is reduced, but contact resistance increases and device performance deteriorates

Engineering Contradiction:
Improveprocess simplicityVSAvoidinterface quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The cleaning process is integrated as a preliminary step before conductive layer deposition. This preliminary action removes the harmful native metal oxide layer without significantly increasing overall process complexity, as it uses standard semiconductor cleaning techniques with fluorine-containing acids or gases that can be implemented in existing cleanroom infrastructure.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If contact structures are formed directly on gate electrodes without cleaning, then manufacturing steps are reduced and productivity increases, but electrical connection quality decreases due to high contact resistance

Engineering Contradiction:
Improvemanufacturing throughputVSAvoidelectrical connection
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The cleaning process is performed as a brief preliminary step (typically seconds to minutes) before conductive layer deposition. This preliminary cleaning action removes the metal oxide barrier without significantly extending the overall manufacturing cycle, thereby maintaining productivity while dramatically improving electrical connection quality through reduced contact resistance.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The cleaning process effectively removes native metal oxide layers, improving electrical connections and overall semiconductor device performance by reducing contact resistance and ensuring a clean interface between different material layers.

Implementation Method 1

A cleaning process using a fluorine-containing acid or gas is employed to remove native metal oxide layers

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS11177173B2Semiconductor device with an interconnect structure and method for forming the same
Publication Date: 2021.11.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11177173B2 patent drawing
  • US11177173B2 patent drawing
  • US11177173B2 patent drawing

AI summary

A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.