Semiconductor Interconnects with Insulating Sidewall Protection

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Solution Overview

Problem

Conductive bumps in semiconductor devices face issues such as the growth of inter-metallic compounds (IMC) and thermal expansion mismatches, leading to early failure and electrical shorts, while conductive vias have limited functionality and alignment reliability due to small contact areas.

Innovation Solution

A method involving the formation of a semiconductor device with a conductive interconnect structure and insulating layers to provide structural support, prevent IMC growth, and maintain electrical connections by exposing and covering specific portions of contact pads, under bump metallization, and conductive vias with insulating layers to manage thermal expansion and prevent shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive bumps are formed to mount and electrically connect semiconductor die to substrate, then electrical connection is improved, but inter-metallic compounds grow and interfere with operability

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidinter-metallic compound growth
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

An underbump metallization layer is introduced as an intermediary between the conductive bump and the semiconductor die contact pad. This intermediate layer acts as a diffusion barrier that prevents inter-metallic compound growth while maintaining electrical connectivity, thus resolving the contradiction between reliable electrical connection and preventing harmful IMC formation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conductive bumps with different material properties than semiconductor die are used, then mounting and electrical connection is achieved, but thermal expansion mismatch causes early failure

Engineering Contradiction:
Improveelectrical connection establishmentVSAvoidthermal expansion stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The underbump metallization layer is constructed as a composite structure with multiple layers having different material properties. This composite design allows optimization of each layer for specific functions: one layer provides electrical conductivity while another layer provides thermal expansion matching with the semiconductor die, thus resolving the contradiction between achieving electrical connection and maintaining thermal stability.

Inventive Principle:
Principle #40Composite materials

3Ease of manufacture

If conductive vias are formed instead of bumps, then manufacturing complexity is reduced, but contact area becomes very small limiting functionality

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidconductive contact area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The conductive interconnect structure transitions from a planar via (two-dimensional contact) to a three-dimensional bump structure with vertical extension. This dimensional change allows the conductive structure to maintain small footprint for ease of manufacture while providing increased contact area and volume for improved electrical connectivity and functionality through the added vertical dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a reliable and cost-effective vertical electrical interconnect structure that enhances the longevity and reliability of semiconductor devices by preventing IMC growth and improving alignment and functionality of electrical connections.

Implementation Method 1

maintaining coverage of the second insulating layer over the sidewall of the bumps and the sidewall of the under bump metallization layer to provide structural support for the bumps and prevent growth of inter-metallic compounds

Methodology Applied
Scientific EffectPhysical barrier protection:

Implementation Method 2

maintaining coverage of the second insulating layer over the sidewall of the bumps and the sidewall of the under bump metallization layer to provide structural support for the bumps

Methodology Applied
Scientific EffectMechanical support:

Data Source

PatentUS9484259B2Semiconductor device and method of forming protection and support structure for conductive interconnect structure
Publication Date: 2016.11.01 STATS CHIPPAC LTD
  • US9484259B2 patent drawing
  • US9484259B2 patent drawing
  • US9484259B2 patent drawing

AI summary

A semiconductor device has a semiconductor wafer with a plurality of contact pads. A first insulating layer is formed over the semiconductor wafer and contact pads. A portion of the first insulating layer is removed, exposing a first portion of the contact pads, while leaving a second portion of the contact pads covered. An under bump metallization layer and a plurality of bumps is formed over the contact pads and the first insulating layer. A second insulating layer is formed over the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps, and upper surface of the bumps. A portion of the second insulating layer covering the upper surface of the bumps is removed, but the second insulating layer is maintained over the sidewall of the bumps and the sidewall of the under bump metallization layer.