Semiconductor Die Interconnect Posts for Reduced Warpage
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Solution Overview
Problem
Current methods for making semiconductor device modules face challenges in increasing yield, reducing warpage, and improving reliability, particularly in forming reliable electrical connections between semiconductor dice and underlying structures.
Innovation Solution
The method involves forming electrically conductive posts by placing a sacrificial material on a support substrate, creating holes in it, filling these holes with conductive material, and then removing the sacrificial material to expose the posts, which are used to connect stacks of semiconductor dice, reducing the need for through-silicon vias and wirebonds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon vias and wirebonds are used to form electrical connections, then reliable electrical connections are achieved, but process complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the need for through-silicon vias and wirebonds by introducing a new interconnection architecture where conductive traces are formed directly on the substrate surface and within encapsulant layers, removing complex intermediate connection structures while maintaining electrical connectivity
Solution Approach 2:
The electrical connection path is segmented into multiple simpler stages: substrate trace formation, encapsulant trace integration, and die pad connections, replacing the monolithic through-silicon via structure with distributed conductive pathways that reduce manufacturing complexity
2Reliability
If conventional connection methods are used, then electrical connectivity is established, but yield is reduced due to manufacturing challenges
Solution Approach 1:
Conductive traces are formed on the substrate and within encapsulant layers before die attachment, allowing pre-verification of connection paths and enabling rework or replacement without compromising the integrity of through-silicon vias that would be created after die mounting
Solution Approach 2:
The substrate and encapsulant materials serve as intermediaries that carry conductive traces between die pads, replacing the direct mechanical and electrical connection of wirebonds with a more robust trace-based intermediary system that is less sensitive to alignment and tension variations
3Ease of manufacture
If sacrificial material and conductive filling process is used, then posts are formed for die stacking, but additional process steps are required
Solution Approach 1:
The formation of conductive posts is merged with the existing encapsulant curing process by incorporating conductive filler particles into the encapsulant material, eliminating the need for separate post formation steps while maintaining the structural and electrical connection functions
Solution Approach 2:
The encapsulant material is given multiple functions: structural support, electrical insulation, and conductive pathway formation through embedded traces and fillers, replacing the need for separate dedicated post structures and reducing overall process complexity
Data Source
AI summary
Semiconductor device modules may include a semiconductor die and posts located laterally adjacent to the semiconductor die. A first encapsulant may laterally surround the semiconductor die and the posts. Electrical connectors may extend laterally from the posts, over the first encapsulant, to bond pads on an active surface of the semiconductor die. A protective material may cover the electrical connectors. A second encapsulant may cover the protective material and the electrical connectors. The second encapsulant may be in direct contact with the first encapsulant, the electrical connectors, and the protective material.