Semiconductor Interconnect Power Rail Redundancy via Multi-Layer Vias
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Solution Overview
Problem
Current interconnect structures for semiconductor devices lack power rail redundancy, leading to device failure if a single power rail fails.
Innovation Solution
A method and structure that includes multiple metallization layers with direct electrical connections between power rails, utilizing a first metallization layer with a power rail, a second metallization layer with additional power rails, and forming metal-filled vias and trenches to establish redundancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single power rail is used in the interconnect structure, then the device complexity is reduced and manufacturing is simpler, but the reliability deteriorates because there is no power rail redundancy
Solution Approach 1:
The power rail system is segmented into multiple independent power rails across different metallization layers. Each metallization layer contains its own power rail, and these segmented power rails are connected through via structures to form a redundant network, allowing the system to tolerate failures in individual segments.
Solution Approach 2:
The solution transitions from a single-plane power rail to a multi-layer three-dimensional interconnect structure. Power rails are distributed across multiple metallization layers (first metallization layer, second metallization layer, etc.), utilizing the vertical dimension to create redundancy without increasing horizontal complexity.
2Reliability
If multiple metallization layers with direct electrical connections are added to provide redundancy, then the reliability is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The interconnect structure is built incrementally layer by layer, with each metallization layer and its associated power rail formed in sequence. Via structures are prepared in advance during the formation of each layer to ensure proper electrical connections are established before subsequent layers are added, simplifying the overall manufacturing process.
Solution Approach 2:
Multiple metallization layers are nested vertically, with each layer containing power rails that are electrically connected to corresponding power rails in adjacent layers through via structures. This nested arrangement consolidates the redundant power rail system into a compact vertical structure that manages complexity through organized layering.
Data Source
AI summary
A method includes providing a starting interconnect structure for semiconductor device(s), the starting interconnect structure including a first metallization layer with a first power rail. The method further includes forming a second metallization layer over the first metallization layer with a second power rail, and directly electrically connecting the first power rail and the second power rail, the directly electrically connecting including forming metal-filled vias between the first power rail and the second power rail. The method further includes forming additional metallization layer(s) over the second metallization layer with additional power rail(s), and directly electrically connecting each of the additional power rail(s) to a power rail of a metallization layer directly below.