Semiconductor Interconnect Structure With Uniform Wet-Etched Anchors

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Solution Overview

Problem

The challenge of forming reliable semiconductor devices with smaller sizes is exacerbated by the difficulty in achieving uniformity of connecting structures due to varying dimension requirements across different regions of the semiconductor substrate, leading to issues in both FEOL and MEOL processes.

Innovation Solution

A method involving a wet-etching operation is employed to form recesses in conductive features, which are then filled with conductive material, ensuring uniformity by minimizing the depth difference ratio of recesses and mitigating metal loss during chemical-mechanical planarization (CMP) through the use of a selective etchant that does not react with the metal of the conductive features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication processes become more difficult and manufacturing precision deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidfabrication precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent divides the interconnect formation process into multiple stages: forming mandrels at first pitch, then forming connecting structures at second pitch (larger than first pitch). This segmentation allows each stage to be optimized independently, maintaining manufacturing precision while achieving high functional density in the final integrated structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional planar interconnects to three-dimensional vertically-stacked interconnects. By utilizing the vertical dimension, the design achieves higher functional density without further reducing lateral feature sizes, thereby avoiding the deterioration of fabrication precision associated with continued scaling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If varying dimension requirements are imposed across different regions of the substrate, then device functionality is improved, but uniformity of connecting structures deteriorates

Engineering Contradiction:
Improvedimensional adaptabilityVSAvoiduniformity of connecting structures
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements different pitch requirements in different regions: a first pitch for mandrels and a second (larger) pitch for connecting structures. This local differentiation allows each region to be optimized for its specific functionality while maintaining uniform manufacturing processes, thereby preserving both adaptability and uniformity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent forms mandrels at the finer first pitch before forming the connecting structures at the larger second pitch. This preliminary action establishes a uniform baseline structure that can then be selectively modified in different regions to meet varying dimensional requirements without compromising overall uniformity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the uniformity of connecting structures by reducing the depth difference ratio of recesses to less than approximately 10%, thereby improving the reliability and efficiency of semiconductor device fabrication.

Implementation Method 1

A method involving a wet-etching operation is employed to form recesses in conductive features

Methodology Applied
Scientific EffectWet etching:

Implementation Method 2

through the use of a selective etchant that does not react with the metal of the conductive features

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS12469789B2Semiconductor structure
Publication Date: 2025.11.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12469789B2 patent drawing
  • US12469789B2 patent drawing
  • US12469789B2 patent drawing

AI summary

A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature, and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.