Semiconductor Interconnect Layout for Low Via-to-Wiring Resistance
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Solution Overview
Problem
As semiconductor elements continue to downscale, the gap between circuit components like wirings and vias decreases, leading to increased resistance issues between the wiring and the via, which affects the reliability of semiconductor devices.
Innovation Solution
The semiconductor device incorporates a lower wiring structure with a lower filling film having a stepped width configuration and a lower barrier film, and an upper wiring structure with an upper via and upper wiring connected by an upper barrier film and upper filling film, ensuring proper alignment and separation to mitigate resistance issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gap between circuit components is decreased to achieve higher integration, then the integration density is improved, but the resistance between wiring and via increases
Solution Approach 1:
The lower filling film is divided into two portions: a first portion with a first width and a second portion with a second width smaller than the first width. This segmentation allows the via to be positioned on the narrower second portion while maintaining adequate contact area with the wider first portion, thus reducing resistance even as overall dimensions are scaled down for higher integration.
Solution Approach 2:
The barrier film is selectively disposed only on the side wall and bottom surface of the first portion of the lower filling film, not on the side wall of the second portion. This local quality approach optimizes the contact area between the via and lower wiring while controlling resistance, allowing the via to make direct contact with the lower filling film in the second portion region where barrier film is absent.
Data Source
AI summary
A semiconductor device includes: a lower wiring including: a lower filling film, which extends in a first direction and includes a first portion having a first width in the first direction and a second portion, having a second width smaller than the first width in the first direction, on the first portion; and a lower barrier film which is disposed on a side wall and a bottom surface of the first portion, and is not disposed on a side wall of the second portion in a cross-sectional view of the first direction; and an upper wiring structure including: an upper via connected to the lower wiring; and an upper wiring extending in a second direction intersecting the first direction on the upper via, wherein the upper wiring structure further includes an upper barrier film, and an upper filling film in a trench defined by the upper barrier film, each of the upper via and the upper wiring comprises the upper barrier film and the upper filling film, and the upper via is not separated from the upper wiring by the upper barrier film, and is separated from the second portion of the lower filling film by the upper barrier film.