Semiconductor Device Metal Interconnect Warpage Reduction
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Solution Overview
Problem
Current semiconductor manufacturing methods face challenges in downsizing and high-density packaging due to the need for wire bonding, complex solder bump formation, and difficulties in forming through electrodes, leading to warpage and voids in semiconductor devices.
Innovation Solution
A semiconductor apparatus with fine electrodes and through electrodes formed on both sides of a second insulating layer, using a photo-curable dry film with a chemically amplified negative resist composition to facilitate stacking and encapsulation, reducing warpage and voids, and enabling dense metal interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If wire bonding is used to connect semiconductor device to substrate, then electrical connection is achieved, but apparatus size increases and downsizing becomes difficult
Solution Approach 1:
The patent extracts the wire bonding process entirely by forming through-electrodes that extend from the semiconductor device surface through the insulating film to the substrate, eliminating the need for separate wire bonding steps and reducing apparatus size
Solution Approach 2:
The patent introduces an intermediary through-electrode structure that bridges the semiconductor device and substrate directly through the insulating film, replacing the wire bonding intermediary with a more compact integrated solution
2Length of moving object
If solder bumps are used for connection, then electrical connection is achieved, but highly dense solder bumps are required with downsizing which is difficult to practice
Solution Approach 1:
The patent extracts the solder bump formation process by using through-electrodes with exposed metal surfaces that can be directly connected to substrate pads, eliminating the need for highly dense solder bumps
Solution Approach 2:
The patent changes the connection parameter from solder bump diameter and density to through-electrode dimensions and metal exposure area, enabling downsizing without proportionally increasing connection density requirements
3Reliability
If through electrodes are formed by dry etching and plating, then electrical connection is achieved, but complicated steps are required
Solution Approach 1:
The patent merges the through-hole formation and metal deposition steps into an integrated through-electrode formation process, reducing the number of separate manufacturing steps while maintaining connection reliability
Solution Approach 2:
The through-electrode structure serves multiple functions: providing electrical connection, acting as a structural support element, and enabling direct mounting surface formation, reducing the need for separate components and steps
4Productivity
If dense metal interconnects are formed, then high density mounting is achieved, but warpage occurs in semiconductor device
Solution Approach 1:
The patent applies counterweight principles by distributing metal interconnect mass symmetrically on both the upper and lower surfaces of the insulating film, balancing thermal and mechanical stresses to prevent warpage while maintaining high mounting density
Solution Approach 2:
The patent changes the interconnect distribution parameter from single-sided dense routing to balanced bi-sided routing, reducing net warpage forces while preserving total connection capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for the easy placement and stacking of semiconductor devices on circuit boards with reduced warpage and voids, even with dense metal interconnects, and facilitates the formation of multilevel interconnects, enhancing the reliability and processing of semiconductor apparatuses.
Implementation Method 1
a photo-curable resin layer having a thickness of 5 to 100 μm and composed of a resist composition
Data Source
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AI summary
The present invention is a semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second insulating layer, wherein the metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second insulating layer, penetrates the second insulating layer from its upper surface, and is electrically connected to the through electrode at an lower surface of the second insulating layer, and an under-semiconductor-device metal interconnect is disposed between the first insulating layer and the semiconductor device, and the under-semiconductor-device metal interconnect is electrically connected to the metal interconnect at the lower' surface of the second insulating layer. This semiconductor apparatus can be easily placed on a circuit board and stacked, and can reduce its warpage even with dense metal interconnects.