Multi-Chip Semiconductor Interconnection Testing with Direct Detection
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Solution Overview
Problem
Existing semiconductor device testing methods for 3D or multi-chip packages are inefficient due to the increased test time caused by the need to test interconnections between semiconductor chips, as failure information must pass through downstream circuits, prolonging the testing process.
Innovation Solution
A semiconductor device and testing method that includes a test circuit unit with a detection circuit, selector control circuit, and expected value generation circuit to directly test the connection between semiconductor chips, using selectors and flip-flop circuits to quickly verify the integrity of interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If test pattern passes through scan chains and downstream circuits to detect failure interconnection, then the test can detect connection failures between semiconductor chips, but the test time increases significantly
Solution Approach 1:
The invention segments the test process by introducing intermediate detection points (detection circuits) between the test pattern source and the final output. Instead of waiting for the pattern to traverse the entire downstream circuit path, the test is divided into segments where intermediate results can be detected and evaluated earlier, thus reducing total test time while maintaining reliability.
Solution Approach 2:
The invention performs preliminary detection actions by placing detection circuits that can evaluate test patterns before they complete the full path through downstream circuits. This preliminary action allows early identification of connection failures, avoiding the time penalty of waiting for patterns to propagate through entire downstream circuit paths.
2Reliability
If scan chains are used to test interconnections between semiconductor chips, then the test can cover all connection paths, but the test complexity increases due to the need to pass through multiple circuits
Solution Approach 1:
The invention introduces detection circuits as intermediary elements between the test pattern source and the final output. These intermediaries simplify the test by providing direct detection points, reducing the need for complex signal routing through multiple downstream circuits while maintaining comprehensive test coverage.
Solution Approach 2:
The test circuit is segmented into modular components (scan chains, detection circuits, expected value generation circuits) that can be independently configured and controlled. This segmentation reduces overall test circuit complexity by allowing targeted testing of specific interconnection paths without requiring complex control of entire downstream circuit paths.
Data Source
AI summary
A semiconductor device includes: a first semiconductor chip including a first internal circuit, first flip-flop circuits connected to the first internal circuit, first selectors, and first electrodes connected to an output of the first selector; first connection conductors; and a second semiconductor chip including second electrodes connected to the first electrode via the first connection conductor and a second internal circuit connected to at least one second electrode. At least one of the first and second semiconductor chips includes a test circuit. The test circuit includes a first detection circuit receiving a signal from each second electrode, a first selector control circuit controlling the selection of the first selector, and an expected value generation circuit. Each first selector includes a signal input receiving a signal from at least one first flip-flop circuit and an expected value input receiving an expected value signal from the expected value generation circuit.