Semiconductor Package Interconnection Structures With Inclined Sidewalls

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Solution Overview

Problem

Conventional semiconductor packages face challenges with misalignment and co-planarity issues during bonding processes, particularly in 3D IC stacking, which can lead to bonding failures due to warpage and require precise alignment and high-temperature, high-pressure conditions.

Innovation Solution

A semiconductor package design featuring interconnection structures with inclined sidewalls and varying grain sizes, allowing for a high tolerance of misalignment and co-planarity, and the formation of a space between these structures to facilitate bonding without precise alignment, using materials like copper, tin, gold, silver, zinc, or their alloys.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If direct bonding between metal interconnection structures is used to stack substrates, then integration density is improved, but manufacturing precision requirements increase due to need for precise alignment and high co-planarity

Engineering Contradiction:
Improveintegration densityVSAvoidalignment precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent introduces a third interconnection structure with an inclined sidewall as an intermediary between the first and second interconnection structures. This intermediary structure acts as a mediator that facilitates bonding while accommodating misalignment, thereby resolving the contradiction between achieving high integration density through direct bonding and maintaining manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The third interconnection structure features an asymmetric inclined sidewall rather than a symmetric vertical sidewall. This asymmetric geometry allows the structure to accommodate misalignment and co-planarity variations during bonding, enabling successful stacking without requiring precise alignment while still achieving high integration density.

Inventive Principle:
Principle #4Asymmetry

2Strength

If high temperature and high pressure conditions are used for Cu-Cu bonding, then bonding strength is improved, but device complexity increases due to requirement of high vacuum environment

Engineering Contradiction:
Improvebonding strengthVSAvoidbonding environment complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The third interconnection structure serves as a intermediary that enables bonding under reduced temperature and pressure conditions compared to conventional direct Cu-Cu bonding. This intermediary structure facilitates the bonding process without requiring extreme conditions, thereby reducing the complexity of the bonding environment while still achieving sufficient bonding strength.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If precise alignment is required for direct bonding, then bonding reliability is improved, but ease of manufacture decreases due to need for high co-planarity

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The third interconnection structure with its inclined sidewall is prepared in advance to accommodate potential misalignment and co-planarity issues. This preliminary structural design ensures that even if alignment is not precise during bonding, the inclined geometry provides a tolerance window that maintains bonding reliability without requiring high manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The asymmetric inclined sidewall of the third interconnection structure provides geometric tolerance that accommodates misalignment and co-planarity variations. This asymmetric design enables easier manufacturing by reducing the stringency of alignment requirements while maintaining bonding reliability through the self-accommodating geometry.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS9917071B1Semiconductor packages
Publication Date: 2018.03.13 ADVANCED SEMICON ENG INC
  • US9917071B1 patent drawing
  • US9917071B1 patent drawing
  • US9917071B1 patent drawing

AI summary

A semiconductor package includes: a first substrate including a first interconnection structure extending from a surface of the first substrate, the first interconnection structure including grains of a first size, a second substrate including: a second interconnection structure comprising grains of a second size, and a third interconnection structure disposed between the first interconnection structure and the second interconnection structure, the third interconnection structure including grains of a third size, a first sidewall inclined at a first angle to a reference plane and a second sidewall inclined at a second angle to the reference plane, wherein the first angle is different from the second angle, the first sidewall is disposed between the first substrate and the second sidewall, and the third size is smaller than both the first size and the second size.