Semiconductor Interconnection Structure Vacuum Processing
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Solution Overview
Problem
The challenge in semiconductor manufacturing is forming accurate interconnection structures with minimal oxidation and atmosphere exposure, particularly in copper interconnect systems, where small feature sizes and high aspect ratios lead to difficulties in filling metal features and scaling barrier layers, resulting in increased resistivity and poor adhesion, which degrades electrical performance.
Innovation Solution
A method is developed to form interconnection structures without breaking vacuum, involving a dry etching process to etch metal and barrier layers, followed by liner layer deposition, all integrated within a processing system to minimize surface oxidation and contamination, ensuring precise profile formation and improved electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dry plasma etching process is used to pattern metal materials, then metal interconnection can be formed, but metal surface is exposed to air causing poor adhesion and high contact resistance
Solution Approach 1:
The patent employs an inert atmosphere environment throughout the processing sequence, where the substrate is transferred through a vacuum chamber from the etching chamber to the deposition chamber without exposure to air. This inert environment prevents oxidation of the metal surface and maintains good adhesion properties, resolving the contradiction between achieving metal patterning and maintaining reliable electrical contact.
Solution Approach 2:
The patent implements a continuous processing sequence where etching and deposition are performed back-to-back in the same vacuum chamber without breaking vacuum or exposing the substrate to air. This continuous action ensures the metal surface remains protected throughout the process, eliminating the adhesion and contact resistance problems caused by air exposure.
2Device complexity
If metal layer is exposed to air during processing, then processing steps can be performed separately, but oxidation forms on metal surface resulting in high contact resistance and poor adhesion
Solution Approach 1:
The patent utilizes a vacuum chamber that maintains an inert atmosphere throughout the entire processing sequence. The substrate is transferred and processed within this controlled environment, preventing oxidation of the metal surface while allowing multiple processing steps to be performed. This resolves the contradiction between system complexity and oxidation control.
Solution Approach 2:
The patent introduces a vacuum chamber as an intermediary environment between the etching and deposition processes. This intermediary space maintains an inert atmosphere that protects the metal surface from oxidation while allowing the necessary processing steps to occur, thus controlling surface oxidation without excessive system complexity.
3Manufacturing precision
If Q-time is extended to ensure complete processing, then thorough etching and deposition are achieved, but excess oxidation forms on metal surface
Solution Approach 1:
The patent performs etching and deposition in continuous sequence within the same vacuum chamber without breaking vacuum or exposing the substrate to air, even though each process requires sufficient time to complete. This continuous action in an inert environment allows thorough processing without the oxidation that would normally occur during extended exposure to air.
Solution Approach 2:
The patent maintains an inert atmosphere throughout the extended processing time required for complete etching and deposition. By keeping the substrate in a vacuum environment throughout the entire sequence, the system allows sufficient processing time without the harmful oxidation that would occur if the substrate were exposed to air during extended processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces surface oxidation and contamination, enhancing the control and accuracy of interconnection structure formation, leading to improved electrical performance and manufacturing efficiency by maintaining the integrity of the metal lines and reducing contact resistance.
Implementation Method 1
A dry plasma etching process is performed to pattern the metal materials to form one or more patterns in the interconnect structure
Implementation Method 2
forming a liner layer on the substrate covering the etched barrier layer
Data Source
AI summary
Embodiments of the present invention provide methods for forming an interconnection structure in semiconductor devices without breaking vacuum with minimum oxidation/atmosphere exposure. In one embodiment, a method for forming an interconnection structure for semiconductor devices includes supplying a barrier layer etching gas mixture into a first processing chamber having a substrate disposed therein to etch portions of a barrier layer exposed by a patterned metal layer until the underlying substrate is exposed, the first processing chamber disposed in a processing system, and forming a liner layer on the substrate covering the etched barrier layer in a second processing chamber disposed in the processing system.