Semiconductor Interconnects with Varying Electron Mean Free Paths
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Solution Overview
Problem
As semiconductor devices downscale and interconnects become narrower, the increased electric resistance and heat generation in memory cell region interconnects lead to signal delays, while peripheral region interconnect resistance issues persist despite using metals with short mean free paths.
Innovation Solution
The semiconductor device employs a multilayer interconnect structure with first and second interconnects made of metals with different electron mean free paths, where tungsten with a shorter mean free path is used in the memory cell region and copper with a longer mean free path is used in the peripheral circuit region, along with trench widths tailored to minimize resistance increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the width of cell region interconnects is reduced to increase integration degree, then the memory capacity increases, but the electric resistance of the interconnects increases causing signal delays and heat generation
Solution Approach 1:
The patent applies different metal materials with different electron mean free paths to different regions (cell region vs. peripheral circuit region) based on their specific requirements. In the cell region where interconnect width is reduced, metals with shorter mean free paths are used to maintain lower resistance, while in the peripheral circuit region, metals with longer mean free paths are used. This local differentiation resolves the contradiction by optimizing each region's electrical properties according to its specific constraints.
Solution Approach 2:
The patent changes the material parameter (electron mean free path) of the interconnect metals to compensate for the increased resistance caused by reduced interconnect width. By selecting metals with appropriate mean free paths based on the interconnect dimensions and region requirements, the patent maintains acceptable resistance levels even as interconnect widths decrease to increase memory capacity.
2Productivity
If interconnects are downscaled to increase integration degree, then the number of elements per area increases, but the electric resistance increases and heat generation occurs
Solution Approach 1:
The patent changes the material parameters (electron mean free path, resistivity) of the interconnect metals to compensate for the increased resistance caused by downscaled dimensions. By selecting metals with appropriate mean free paths that match the scaled dimensions, the patent reduces the resistive heating effect that would otherwise result from miniaturization, thereby maintaining energy efficiency while achieving higher integration degrees.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration maintains lower resistivity in both regions, reduces signal delays, and prevents the skin effect associated with ferromagnetic materials, thereby enhancing the performance and efficiency of semiconductor memory devices.
Implementation Method 1
a first interconnect (6a) made of a first metal and provided in a first trench (4), a second interconnect (7a) made of a second metal and provided in a second trench (5)... A mean free path of electrons in the first metal is shorter than a mean free path of electrons in the second metal
Data Source
AI summary
According to an embodiment, a semiconductor device, includes a substrate, an inter-layer insulating layer provided above the substrate, a first interconnect provided in a first trench, and a second interconnect provided in a second trench. The first interconnect is made of a first metal, and the first trench is provided in the inter-layer insulating layer on a side opposite to the substrate. The second interconnect is made of a second metal, and the second trench is provided in the inter-layer insulating layer toward the substrate. A width of the second trench is wider than a width of the first trench. A mean free path of electrons in the first metal is shorter than a mean free path of electrons in the second metal, and the first metal is a metal, an alloy or a metal compound, including at least one nonmagnetic element as a constituent element.