Semiconductor Bonding Interface with Agglomerates for Oxide-Free Conduction
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Solution Overview
Problem
Existing methods for bonding semiconductor layers to carrier substrates face challenges such as the formation of amorphous layers that hinder vertical electrical conduction and require managing native oxide layers, leading to poor interface quality and mechanical strength.
Innovation Solution
A method involving the deposition of a thin film of a semiconductor material different from the layer and substrate, followed by annealing to form regions of direct contact and agglomerates, which trap oxygen and ensure mechanical and electrical continuity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If direct bonding is performed between working layer and carrier substrate, then mechanical strength and electrical conduction are improved, but native oxide layers prevent direct contact and reduce bond quality
Solution Approach 1:
A thin film (less than 50 nm) of semiconductor material different from the working layer and carrier substrate is deposited on the free face of the working layer and/or carrier substrate before bonding. This preliminary deposition creates a controlled interface structure that facilitates direct bonding while managing oxide layer effects.
Solution Approach 2:
The deposited thin film acts as an intermediary layer between the working layer and carrier substrate. This intermediate film material serves as a mediator that enables direct bonding by providing a suitable interface for molecular adhesion while managing the presence of native oxide layers.
2Strength
If argon bombardment is used to activate surfaces for direct bonding, then bonding energy is improved, but amorphous layer formation adversely affects vertical electrical conduction
Solution Approach 1:
The harmful amorphous layer effect is extracted and isolated by confining it within the deposited thin film. The amorphous layer forms inside the deposited film rather than at the critical bonding interface, separating the bonding enhancement function from the electrical conduction path.
Solution Approach 2:
Different regions of the interface structure are given different properties: the deposited film region accommodates amorphous layer formation for bonding enhancement, while the regions of direct contact between working layer and carrier substrate maintain crystalline quality for electrical conduction.
3Reliability
If heavy doping is applied to overcome amorphous layer effects, then electrical conduction is improved, but manufacturing complexity increases
Solution Approach 1:
A thin, disposable film of less than 50 nm is used as a sacrificial or functional layer that manages the amorphous layer issue without requiring heavy doping. This thin film approach is simpler and more controllable than heavy doping processes.
4Reliability
If thin film deposition is performed to enable direct bonding, then interface quality is improved, but manufacturing precision requirements increase
Solution Approach 1:
The film thickness parameter is optimized to be less than 50 nm, which is thin enough to enable direct bonding and manage oxide effects, but thick enough to accommodate amorphous layer formation and maintain electrical conduction. This parameter optimization balances interface quality with manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves high-quality vertical electrical conduction and mechanical strength by forming regions of direct contact free of native oxides, with agglomerates trapping oxygen, ensuring effective electrical and mechanical integrity.
Implementation Method 1
annealing the intermediate structure at a temperature higher than or equal to a critical temperature, so as to bring about segmentation of the encapsulated film
Implementation Method 2
depositing a film composed of a semiconductor material different from that or those of the working layer and of the carrier substrate
Data Source
AI summary
A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: —regions of direct contact between the working layer and the carrier substrate; and —agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.