Semiconductor Interlayer Connection via Recessed Metallization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The production of long interlayer connections in semiconductor substrates with small diameters is expensive due to long etching times, limiting aspect ratios to 5:1 or 10:1, and current methods require a significant thermal budget that can damage electronic components.
Innovation Solution
A semiconductor substrate with an embedded insulation layer, where contact-hole fillings penetrate through one layer to the insulation layer, allowing for recessed metallization that connects electrically with the contact-hole filling, simplifying the production process and enabling thicker substrates for interlayer connections without the need for a high thermal budget.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If long etching times are used to produce interlayer connections with small diameters, then manufacturing precision is improved, but production cost increases and productivity decreases
Solution Approach 1:
The substrate is thinned to 200-300 μm thickness before producing the interlayer connections. This preliminary thinning action reduces the etching depth required, enabling faster etching processes while maintaining precise control over the small connection diameters, thus resolving the contradiction between manufacturing precision and productivity
2Manufacturing precision
If substrate thickness is reduced to enable small diameter interlayer connections, then aspect ratio is improved, but substrate mechanical strength deteriorates
Solution Approach 1:
The substrate structure incorporates multiple layers including the thinned substrate (200-300 μm), insulation layer, contact-hole filling material, and metallization layers. This composite structure enables the thin substrate to achieve high aspect ratios (50:1 or more) while maintaining mechanical integrity through the combined strength of different materials and the structural support provided by the interlayer connection components
3Reliability
If high thermal budget processes are used to produce contact-hole fillings, then electrical conductivity is improved, but electronic component integrity deteriorates
Solution Approach 1:
The contact-hole filling process uses doped polysilicon instead of metal, which can be deposited and doped at lower temperatures. This parameter change in material selection allows achieving the required electrical conductivity for interlayer connections without subjecting the substrate and electronic components to high thermal budgets that would damage sensitive components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces production costs and complexity by allowing for higher aspect ratios and thinner substrates, enabling efficient interlayer connections while preserving the integrity of electronic components.
Implementation Method 1
a recess with layered metallization deposited in this recess is present on the opposite side
Data Source
AI summary
The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.