Semiconductor Device Interposing Film Space for Package Stress Reduction
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Solution Overview
Problem
Conventional semiconductor devices experience significant package stress due to differences in linear expansion coefficients between the lead frame, semiconductor chip, and encapsulating resin, leading to variations in characteristic values, especially for sensitive integrated circuits like sensors or circuit sections.
Innovation Solution
A semiconductor device design that includes a lead frame with a die pad, a semiconductor chip bonded through an interposing film and adhesive layer, and encapsulating resin, featuring a space above the semiconductor chip's back surface to release stress and reduce package stress by preventing direct contact between the chip and the adhesive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the semiconductor chip is directly bonded to the die pad through adhesive layer, then the bonding strength is improved, but the package stress increases causing variation in characteristic values
Solution Approach 1:
An interposing film is introduced between the semiconductor chip and the adhesive layer as an intermediary element. This film has a first opening that forms a space, allowing it to mediate the stress transmission while maintaining the bonding connection. The interposing film thus serves as a mediator that preserves bonding strength while reducing the harmful package stress that causes characteristic value variation.
Solution Approach 2:
The interposing film is designed with non-uniform structure - it has a first opening forming a space above a part of the back surface of the semiconductor chip, while maintaining film structure in other areas. This local variation in structure allows the film to provide stress relief in specific regions while maintaining bonding integrity in other regions, thus locally optimizing both bonding strength and stress reduction.
2Stability of the object's composition
If the die pad is made smaller than the semiconductor chip, then the stress distribution becomes uniform, but the magnitude of stress cannot be decreased
Solution Approach 1:
The interposing film with its first opening extracts or removes the adhesive layer from direct contact with part of the semiconductor chip's back surface. By taking out the adhesive layer from this specific region, a space is formed that allows stress to be released, thereby reducing the overall magnitude of package stress while maintaining uniform stress distribution through the remaining bonded areas.
3Ease of manufacture
If thermosetting resin paste is used for bonding, then the bonding process is simplified, but significant package stress occurs due to linear expansion coefficient differences
Solution Approach 1:
The interposing film serves as an intermediary layer between the thermosetting resin paste (adhesive layer) and the semiconductor chip. This intermediary structure allows the use of simplified thermosetting resin paste bonding process while the interposing film's opening absorbs and releases the stress generated by linear expansion coefficient differences, thus maintaining manufacturing simplicity while reducing package stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces package stress and minimizes variations in characteristic values by allowing stress release through the space, providing a more stable performance for sensitive integrated circuits.
Implementation Method 1
a back surface that is die-bonded onto the die pad through intermediation of an interposing film and an adhesive layer
Implementation Method 2
The interposing film has a first opening which forms a space between a part of the back surface of the semiconductor chip and the adhesive layer
Data Source
AI summary
A semiconductor device includes a lead frame having a die pad; a semiconductor chip having a front surface in which an integrated circuit is formed, and a back surface that is die-bonded onto the die pad through intermediation of an interposing film and an adhesive layer; and an encapsulating resin for encapsulating the lead frame, the adhesive layer, the interposing film, and the semiconductor chip. The interposing film has a first opening which forms a space between a part of the back surface of the semiconductor chip and the adhesive layer.