Semiconductor Interrupt Pattern Generator for High-Speed Serial Loopback Testing
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Solution Overview
Problem
High-speed serial interface testing is hindered by the inability of existing LSI testers to cope with increased transfer frequencies, leading to prohibitively expensive high-speed testers and the inability to conduct tests for high-speed serial transmission or interrupts during field use.
Innovation Solution
A semiconductor device configuration with an interrupt pattern generator, selector, and skew compensation circuit allows for the insertion and detection of interrupt frames within through-frames, enabling loopback testing without the need for costly high-speed testers, using two semiconductor devices to generate and activate interrupt signals and data for comparison with expected patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed serial interface testing is performed using conventional LSI testers, then testing capability is provided, but the tester cost becomes prohibitively expensive due to the inability to cope with increased transfer frequencies
Solution Approach 1:
A loopback test mechanism is introduced as an intermediary solution, allowing serial data to be transmitted from one semiconductor device through a transmission line to another device and looped back for comparison. This eliminates the need for expensive high-speed testers by using the semiconductor devices themselves to perform the high-speed transmission and comparison functions.
Solution Approach 2:
The invention uses a pattern generator to create test patterns and a pattern comparator to compare received patterns with expected patterns. By copying the transmission and reception paths within the semiconductor devices themselves, the system can perform high-speed testing without requiring external high-speed testing equipment.
2Speed
If high-speed serial transmission testing is conducted, then transfer speed is improved, but the ability to detect and measure interrupt frames is lost due to tester limitations
Solution Approach 1:
The semiconductor device performs self-testing by generating test patterns internally, transmitting them through the serial interface, and comparing the received patterns with expected patterns using an integrated pattern comparator. This self-service capability allows the device to test its own high-speed transmission and interrupt frame detection functions without external testing equipment.
Solution Approach 2:
The loopback test provides feedback by transmitting serial data through the complete signal path and comparing the returned data with the original test pattern. This feedback mechanism enables detection of transmission errors, skew, and interrupt frame issues at high speeds by using the device's own resources rather than external testers.
3Adaptability or versatility
If conventional testing configurations are used, then existing tester compatibility is maintained, but interrupt testing during field use becomes impossible
Solution Approach 1:
The semiconductor device integrates multiple functions including pattern generation, serial transmission, loopback capability, and pattern comparison within a single device architecture. This multi-functionality allows the same device to perform both normal operation and self-testing, enabling interrupt testing during field use without requiring separate testing equipment or configurations.
Data Source
AI summary
A semiconductor device including an interrupt pattern generator for generating an interrupt enabling signal and interrupt data, an input buffer for receiving input serial data, a selector, receiving through-data serially output from said input buffer and serial data obtained on parallel-to-serial conversion of said interrupt data, for selecting and serially outputting said through-data when said interrupt enabling signal is in an inactive state, and for selecting and serially outputting said interrupt data when said interrupt enabling signal is in an active state, and a circuit exercising control for instructing said interrupt pattern generator to generate said interrupt data and to activate said interrupt enabling signal in case the information instructing the merging of said interrupt data in a predetermined position of said through-data is detected from said input serial data.