Semiconductor Device Invisible Bias Generator Reverse Engineering

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Solution Overview

Problem

Existing semiconductor devices are vulnerable to reverse engineering techniques, as their physical geometry reveals their logic functions, allowing unauthorized access to circuit design.

Innovation Solution

The design of semiconductor devices with invisible bias generators (IBGs) where internal devices have the same physical geometry but operate differently, using doping levels to control voltage levels and logic functions, making it difficult to determine their operating characteristics through conventional teardown methods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor device design is used, then the device structure is simple and easy to manufacture, but the device is vulnerable to reverse engineering as physical geometry reveals logic functions

Engineering Contradiction:
Improveprotection against reverse engineeringVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the physical parameters of the semiconductor device by introducing invisible bias generators that modify voltage levels and operating characteristics without altering the visible physical geometry. This allows the device to maintain its simple external structure while internally implementing complex protection mechanisms that prevent reverse engineering.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invisible bias generator acts as an intermediary element that mediates between the visible device structure and the hidden logical function. It introduces intermediate voltage levels and bias conditions that obscure the relationship between physical geometry and logic function, preventing direct reverse engineering while maintaining device functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If invisible bias generators are introduced to protect against reverse engineering, then protection effectiveness increases, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveprotection against reverse engineeringVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The protection mechanism is implemented locally through invisible bias generators that are integrated at specific strategic points within the device architecture. Rather than requiring global structural changes, the local introduction of bias generators with specific voltage levels and connection patterns provides protection while minimizing impact on overall manufacturing processes.

Inventive Principle:
Principle #3Local quality

3Difficulty of detecting and measuring

If physical geometry is made identical for different logic devices, then reverse engineering difficulty increases, but device design flexibility decreases

Engineering Contradiction:
Improvereverse engineering difficultyVSAvoiddesign flexibility
Core Design Contradiction:
Difficulty of detecting and measuringVSAdaptability or versatility

Solution Approach 1:

The patent decouples the relationship between physical geometry and logical function by introducing invisible parameters (bias voltages, operating levels) that determine device behavior. Devices with identical physical geometries can be assigned different logical functions through parameter changes in the bias generators, thereby maintaining design flexibility while increasing reverse engineering difficulty.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of IBGs in semiconductor devices renders them resistant to conventional reverse engineering techniques, forcing more complex and error-prone methods, thereby protecting the circuit design from unauthorized access.

Implementation Method 1

exposing the second metal layer to an ion beam results in at least one gate failure

Methodology Applied
Scientific EffectIon beam exposure: Ion Implantation

Data Source

PatentUS9972585B2Semiconductor device having features to prevent reverse engineering
Publication Date: 2018.05.15 VST HLDG CORP
  • US9972585B2 patent drawing
  • US9972585B2 patent drawing
  • US9972585B2 patent drawing

AI summary

An electronic device includes: a base layer; a first layer located at least partially over the base layer; a second layer located at least partially over the first layer; a first metal layer located at least partially over the second layer, wherein one or more signal outputs of the electronic device are formed in the first metal layer; and a second metal layer located at least partially over the first metal layer, wherein one or more gate connection is formed in the second metal layer, wherein removing a portion of the second metal layer disrupts at least one gate connection and deactivates the device.