Semiconductor Input-Output Block Layout for Signal Path Optimization

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Solution Overview

Problem

In semiconductor devices with multiple functional blocks, sharing pads leads to uneven wiring lengths, resulting in voltage drops and noise due to varying resistance and capacitance in signal paths, which complicates chip design and increases the risk of wiring congestion and short circuits.

Innovation Solution

The semiconductor device is designed with first and second input-output blocks positioned to oppose each other, allowing electrode pads to be connected to these blocks via short-distance wirings, optimizing resistance and capacitance in signal paths and reducing noise, while also allowing for efficient layout arrangements that minimize wiring length and congestion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a pad is shared among a plurality of functional blocks, then the number of pads is reduced, but the wiring length from the pad to each functional block becomes uneven, resulting in varying resistance and capacitance

Engineering Contradiction:
Improvenumber of padsVSAvoidwiring length uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent introduces intermediate blocks (input-output blocks) as segmentation points between the shared pad and multiple functional blocks. This divides the original long wiring path into multiple shorter segments, each with controlled length and impedance characteristics, thereby reducing wiring length unevenness while maintaining pad sharing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The input-output blocks serve as intermediary elements that mediate between the shared pad and the functional blocks. These intermediaries provide standardized connection interfaces and control the wiring length and impedance characteristics, ensuring uniform electrical characteristics despite the shared pad configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If wiring length is reduced to minimize resistance and capacitance, then signal quality improves, but layout complexity and design constraints increase

Engineering Contradiction:
Improvesignal qualityVSAvoidlayout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the electrical parameters (wiring length, resistance, capacitance) by introducing intermediate blocks that provide optimized connection paths. This allows achieving better signal quality through controlled parameter changes without proportionally increasing layout complexity, as the intermediate blocks provide standardized connection interfaces.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If pads are arranged at predetermined intervals along the outer periphery, then pad placement is simplified, but wiring length to internal functional blocks becomes excessively long

Engineering Contradiction:
Improvepad placement simplicityVSAvoidwiring length
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent transitions from direct two-dimensional wiring from peripheral pads to functional blocks by introducing intermediate blocks as a third dimensional layer in the signal path. This allows pads to remain at the periphery for ease of manufacture while the intermediate blocks provide optimized routing paths that reduce the effective wiring length to internal functional blocks.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20230095204A1Semiconductor device, method of testing the same, and method of designing the same
Publication Date: 2023.03.30 RENESAS ELECTRONICS CORP
  • US20230095204A1 patent drawing
  • US20230095204A1 patent drawing
  • US20230095204A1 patent drawing

AI summary

Signal delay, etc. in a signal path from an electrode pad to a functional block is reduced. An input-output block A and an input-output block B are connected to electrode pads. A functional block A is connected to the electrode pads via the input-output block A. A functional block B is connected to the electrode pads via the input-output block B. The functional block A and the functional block B are arranged at positions opposed to each other so as to sandwich the input-output block A and the input-output block B.