Semiconductor I/O Circuit High-Speed Low-Voltage Operation
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Solution Overview
Problem
Current semiconductor integrated circuit devices face challenges in achieving low-voltage high-speed operation for 1.8 V I/O while maintaining low manufacturing costs, as using transistors designed for 3.3 V results in slowed operation and increasing leakage current, and using transistors for 1.2 V requires additional processes and cost increases.
Innovation Solution
A semiconductor integrated circuit device design that applies a high voltage to level conversion and pre-buffer units to amplify signal voltage and convert it to a higher power supply voltage, enabling high-speed operation at 1.8 V without significantly increasing leakage current or manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If transistors designed for 3.3 V are used for 1.8 V operation, then manufacturing cost is reduced, but operation speed decreases significantly
Solution Approach 1:
The patent applies different power supply voltages to different circuit blocks dynamically. The level conversion unit and pre-buffer unit operate at 3.3 V to provide high-speed operation, while the main buffer operates at 1.8 V for low-voltage I/O. This dynamic voltage allocation allows the system to achieve high-speed operation where needed while maintaining low-voltage operation elsewhere, resolving the contradiction between manufacturing cost and operation speed.
Solution Approach 2:
The patent implements local quality by assigning different voltage characteristics to different functional units. Specifically, the level conversion unit and pre-buffer unit are designed with 3.3 V power supply capability to ensure high-speed signal conversion, while the main buffer uses 1.8 V for low-voltage I/O operation. This localized voltage differentiation allows each unit to operate optimally, resolving the speed-c cost trade-off.
2Speed
If transistors for 1.2 V are used to achieve high-speed 1.8 V operation, then operation speed improves, but manufacturing complexity and cost increase
Solution Approach 1:
The patent makes the level conversion unit and pre-buffer unit multi-functional by designing them to operate at 3.3 V, allowing them to serve both high-speed signal conversion functions and low-voltage I/O functions through appropriate voltage selection. This universality eliminates the need for separate 1.2 V transistors, reducing manufacturing complexity while maintaining high-speed capability where needed.
Data Source
AI summary
A semiconductor integrated circuit device including an I/O circuitry capable of low-voltage high-speed operation at low cost is provided. In the I/O circuitry, when an I/O voltage (for example, 3.3 V) is lowered to a predetermined voltage (for example, 1.8 V), portions causing a speed deterioration are a level conversion unit and a pre-buffer unit for driving a main large-sized buffer. In view of this, a high voltage is applied to a level up converter and a pre-buffer circuit. By doing so, it is possible to achieve an I/O circuitry capable of low-voltage high-speed operation at low cost.