Isolation Area Between Semiconductor Devices With Active Channel
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Solution Overview
Problem
In complementary metal oxide semiconductor image sensor circuits, Random Telegraph Signal (RTS) noise is a significant issue due to charge trapping at Si-SiO2 interfaces, which degrades imaging quality, especially at low light levels, and existing noise reduction techniques either do not completely eliminate this noise or require increased pixel area, reducing density and increasing costs.
Innovation Solution
The solution involves widening the channel under the source-follower gate by removing Shallow Trench Isolation (STI) and adjacent STI protect doping features, thereby minimizing electron trapping at STI interfaces and reducing RTS noise, while maintaining or increasing the active area to enhance pixel performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If STI and STI implant protection are used to protect devices from charge accumulation, then device protection is improved, but the width of the active area is reduced
Solution Approach 1:
The patent extracts and removes the STI and STI implant protection structures from the device layout. By taking out these protective features that were causing active area reduction, the invention achieves full active area utilization while maintaining device protection through alternative means (proper device spacing and isolation)
Solution Approach 2:
The patent applies local quality by providing protection only where absolutely necessary - through strategic device spacing and targeted isolation structures rather than universal STI coverage. This allows active area to be maximized in regions where STI would otherwise be present, while still maintaining adequate protection at critical interfaces
2Object-affected harmful factors
If pixel area is increased to reduce RTS noise impact, then noise reduction is improved, but pixel density is reduced
Solution Approach 1:
The patent extracts the root cause of RTS noise by removing STI structures and their associated interface defects. By taking out the source of charge trapping (STI Si-SiO2 interfaces), the invention reduces RTS noise without requiring increased pixel area, thus maintaining high pixel density
Solution Approach 2:
Instead of the conventional approach of increasing pixel area to mitigate noise impact, the patent inverts the strategy by removing the noise source (STI structures) itself. This allows noise reduction while maintaining or even increasing pixel density, as the active area is no longer consumed by protective isolation structures
3Object-affected harmful factors
If channel width is increased to reduce electron trapping, then RTS noise is reduced, but device area increases
Solution Approach 1:
The patent extracts and removes STI structures that cause electron trapping at their interfaces. By taking out the trapping centers (STI Si-SiO2 interface defects), the invention achieves reduced electron trapping without needing to increase channel width or device area
Solution Approach 2:
The patent changes the critical parameter from channel width to STI presence/absence. Instead of modifying geometric parameters (increasing width), the invention changes the structural parameter by eliminating STI structures, thereby reducing electron trapping while maintaining compact device dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces RTS noise, improving imaging quality without compromising pixel density or increasing costs, as it widens the transistor channel and reduces electron trapping, leading to enhanced signal-to-noise ratio and overall circuit performance.
Implementation Method 1
RTS noise is caused, at least in part, by defects at interfaces between Si and SiO2 layers in the system. It is believed that charge carriers are trapped and detrapped at these interface defects.
Data Source
AI summary
An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.