Semiconductor Isolation Boundary Structure With Asymmetric Trenches

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Solution Overview

Problem

In semiconductor devices with different operation voltages and dimensions integrated on the same chip, boundary structures often exhibit poor cross-sectional shapes, leading to breakage, current leakage, and noise interference during testing due to point discharge.

Innovation Solution

A method involving the formation of a dielectric liner in a first trench of a substrate's first region followed by the creation of a second trench in the adjacent region, both filled with insulating material to form asymmetrical trenches with a dielectric liner on one side, improving the boundary structure's shape and reducing the likelihood of breakage and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If symmetrical trenches are formed in both regions without dielectric liner, then manufacturing process is simple, but boundary structure has poor cross-sectional shape leading to breakage and pollution

Engineering Contradiction:
Improvecross-sectional shape of boundary structureVSAvoidisolation structure configuration
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by forming a dielectric liner only in the first trench of the first region, while the second trench in the second region remains without dielectric liner. This asymmetric configuration creates different isolation structures in different regions, which improves the cross-sectional shape of the boundary structure and prevents breakage and pollution, while still maintaining a relatively simple manufacturing process.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent applies local quality by selectively placing the dielectric liner only in specific regions (first region) where it is most needed for boundary structure stability. The second region maintains a simpler structure without the dielectric liner, optimizing the overall device performance by applying different structural qualities to different local regions based on their specific requirements.

Inventive Principle:
Principle #3Local quality

2Reliability

If sharp top boundary structure is formed, then manufacturing is easier, but point discharge occurs causing current leakage and noise

Engineering Contradiction:
Improvecurrent leakage preventionVSAvoidboundary structure shape control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The asymmetric isolation structure with dielectric liner in the first region and without dielectric liner in the second region creates a rounded boundary structure that eliminates sharp tops. This asymmetric configuration prevents point discharge and current leakage while maintaining manufacturing feasibility through standard trench formation and filling processes.

Inventive Principle:
Principle #4Asymmetry

3Adaptability or versatility

If different voltage devices are integrated on same chip, then production cost is reduced and performance enhanced, but boundary structure problems occur between regions

Engineering Contradiction:
Improvedevice integration capabilityVSAvoidboundary structure stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by implementing region-specific isolation structures: the first region (with medium/high voltage devices) receives a dielectric liner in its trench, while the second region (with low voltage devices) maintains a simpler structure without dielectric liner. This localized differentiation ensures boundary structure stability between different voltage regions while enabling diverse device integration on the same chip.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250014941A1Isolation structure of semiconductor device and method for fabricating the same
Publication Date: 2025.01.09 UNITED MICROELECTRONICS CORP
  • US20250014941A1 patent drawing
  • US20250014941A1 patent drawing
  • US20250014941A1 patent drawing

AI summary

An isolation structure of a semiconductor device includes a substrate, a first isolation structure and a second isolation structure. The substrate has a first region and a second region, and there is a boundary between the first region and the second region. The first isolation structure is disposed in the first region of the substrate, and the first isolation structure includes a dielectric liner and a first insulating layer. The second isolation structure is disposed in the second region of the substrate, and the second isolation structure includes a second insulating layer. The first isolation structure and the second isolation structure are respectively located on both sides of the boundary.