Semiconductor Isolation Structure With Bottom-Groove Oxidation

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Solution Overview

Problem

The introduction of polysilicon thin layer compensation technology in semiconductor manufacturing leads to the formation of thicker silicon gaskets at the bottom of isolation grooves with high depth-to-width ratios, which cannot be completely oxidized, resulting in a weakened isolation effect and electrical abnormalities in semiconductor devices.

Innovation Solution

A method involving the formation of a semiconductor structure with isolation grooves, where a first protective layer is applied to the side walls of the top region isolation grooves to prevent oxidation, and oxidation treatment is performed on the bottom region isolation grooves to convert the semiconductor substrate into a second substrate isolation layer, enhancing the isolation effect by increasing the feature size of the bottom of the isolation structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If polysilicon thin layer compensation technology is introduced, then the isolation groove can be formed with high depth-to-width ratio, but thicker silicon gasket is generated at the bottom which cannot be completely oxidized, weakening the isolation effect

Engineering Contradiction:

Improveisolation groove depth-to-width ratioVSAvoidisolation effect

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The isolation groove is divided into two distinct regions: a top region isolation groove and a bottom region isolation groove. The top region has a smaller cross-sectional area while the bottom region has a larger cross-sectional area. This segmentation allows the bottom region to provide sufficient oxidation space for complete oxidation of silicon gasket, while the top region maintains the required high depth-to-width ratio for effective isolation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the isolation groove are given different cross-sectional areas to serve different functions. The bottom region is designed with larger cross-section to ensure complete oxidation of silicon gasket, while the top region maintains smaller cross-section to achieve the required depth-to-width ratio. This local quality differentiation resolves the contradiction between isolation effect and manufacturing precision.

Inventive Principle:

Principle #3Local quality

2Reliability

If oxidation treatment is performed on the bottom region isolation groove to improve isolation effect, then the feature size of the bottom of isolation structure is enlarged, but the feature size of the active region between isolation grooves may be reduced

Engineering Contradiction:

Improveisolation effectVSAvoidactive region feature size

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

A first protective layer is formed covering the side wall of the top region isolation groove and the top of the semiconductor substrate before oxidation treatment. This protective layer prevents oxidation of the semiconductor substrate in the active region during the oxidation process, ensuring that the feature size of the active region remains unchanged while allowing the bottom region to be oxidized for improved isolation effect.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The first protective layer acts as an intermediary substance that selectively protects the semiconductor substrate in the active region from oxidation. It allows the oxidation process to proceed in the bottom region isolation groove while preventing oxidation at the top, thus mediating between the need for improved isolation effect and the need to maintain active region feature size.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents the reduction of the active region feature size between isolation grooves and improves the isolation effect by enlarging the feature size of the bottom of the isolation structure, thereby enhancing the electrical performance of semiconductor devices.

Implementation Method 1

a first protective layer covering the side wall of the top region isolation groove and the top of the semiconductor substrate is formed

Methodology Applied

Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

oxidation treatment is performed on the bottom region isolation groove to oxidize a part of the semiconductor substrate close to the bottom region isolation groove to form a second substrate isolation layer

Methodology Applied

Scientific EffectOxidation: Oxidation

Data Source

PatentUS11869802B2Method of forming semiconductor isolation structure and semiconductor isolation structure

Publication Date: 2024.01.09 CHANGXIN MEMORY TECH INC

AI summary

A method of forming a semiconductor structure and the semiconductor structure are provided. The method includes the following operations. A semiconductor substrate is provided, in which a plurality of isolation grooves distributed at intervals are provided in the semiconductor substrate, and each of the isolation grooves includes a top region isolation groove and a bottom region isolation groove. A first protective layer covering the side wall of the top region isolation groove and the top of the semiconductor substrate is formed. Oxidation treatment is performed on the bottom region isolation groove to oxidize a part of the semiconductor substrate close to the bottom region isolation groove to form a second substrate isolation layer. A dielectric layer filling the isolation groove is formed. The first protective layer and the dielectric layer higher than the top of the semiconductor substrate are etched to form an isolation structure.