Semiconductor Isolation Structure for Bulk Leakage Blocking
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Solution Overview
Problem
Existing semiconductor devices face challenges in forming isolation structures to isolate different device regions, particularly in multi-gate devices like MBC transistors, which can increase device widths and hinder high packing density applications due to bulk leakage issues.
Innovation Solution
A deep isolation structure is introduced at the well junction between p-type and n-type wells, featuring a notch that undercuts active regions, and is combined with shallow trench isolation to enhance isolation and reduce bulk leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sheet-like channel members are used in MBC transistors to improve gate control and drive current, then device performance is improved, but device width increases which reduces packing density
Solution Approach 1:
The channel region is segmented into multiple fins rather than using a single sheet-like channel member. This segmentation allows the gate to wrap around multiple discrete fin structures, maintaining strong gate control while reducing the overall device footprint through vertical stacking and compact lateral arrangement of the fins.
Solution Approach 2:
The channel structure transitions from a two-dimensional sheet-like configuration to a three-dimensional fin-based structure. By extending the channel vertically to form multiple fins, the device achieves enhanced gate control through increased gate-channel coupling area while maintaining a compact lateral footprint, effectively utilizing the vertical dimension to resolve the contradiction.
2Reliability
If isolation structures are formed to isolate different device regions, then bulk leakage is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The isolation structure is merged with the fin configuration by forming fins that extend through the isolation layer. This integration allows the isolation function to be achieved without requiring separate, complex isolation structures, as the fins themselves provide the necessary electrical isolation between adjacent device regions while maintaining manufacturing simplicity.
Solution Approach 2:
The fin structure serves multiple functions simultaneously: it provides the active channel region for device operation, acts as the isolation structure between adjacent devices, and enables bulk leakage reduction. This multi-functionality eliminates the need for separate isolation structures, reducing overall device complexity while achieving effective isolation.
Data Source
AI summary
Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.


