Semiconductor Element Isolation Structure with Dual-Depth Trenches

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing method for forming element isolation structures in semiconductor devices faces issues such as defective coating, voids due to insufficient gap-filling, and surface roughness caused by the separate formation of deep and shallow trenches, leading to unstable device characteristics.

Innovation Solution

A method involving the formation of a deep trench followed by a shallow trench, with the use of hard masks and chemical vapor deposition (CVD) oxide patterns to ensure overlap and minimize undercut, eliminating the need for post-deep trench photolithography and spin coating, thereby stabilizing the trench structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a deep trench is formed first and then a shallow trench is formed by photolithography, then dual-depth trench isolation is achieved, but the deep trench interrupts UV exposure causing incomplete photosensitive film exposure and remaining unexposed portions that generate notches during etching

Engineering Contradiction:
Improvetrench isolation precisionVSAvoiddevice characteristic stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A CMP process is introduced as an intermediary step between deep trench formation and shallow trench photolithography. The CMP planarizes the surface by removing the deep trench, creating a flat surface that allows uniform UV exposure of the photosensitive film during shallow trench formation, eliminating the exposure interruption problem

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The process is segmented into distinct stages: deep trench formation, CMP planarization, and shallow trench photolithography. This segmentation allows each process to be optimized independently and eliminates the interference between deep and shallow trench formations

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If spin coating is used to coat photosensitive film after deep trench formation, then shallow trench patterning is enabled, but insufficient gap-filling occurs causing defective coating and voids

Engineering Contradiction:
Improveshallow trench patterningVSAvoidcoating quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The CMP process is performed preliminarily to planarize the surface before photolithography. This preliminary action creates a flat surface that enables uniform photosensitive film coating through spin coating, eliminating the gap-filling insufficiency problem

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If deep and shallow trenches are formed separately, then dual-depth isolation is achieved, but surface roughness is generated leading to unstable device characteristics

Engineering Contradiction:
Improvedual-depth trench formationVSAvoiddevice characteristic stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

CMP planarization is introduced as an intermediary process between deep and shallow trench formation. This process removes surface roughness generated by deep trench formation, creating a flat surface that ensures stable device characteristics while maintaining dual-depth trench isolation

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes poly stringers, reduces surface roughness, eliminates defective coatings, and ensures stable dual-depth trench formation, enhancing the isolation characteristics and operation of high voltage devices.

Implementation Method 1

chemical vapor deposition (CVD) oxide patterns

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS9396985B2Element isolation structure of semiconductor and method for forming the same
Publication Date: 2016.07.19 SK KEYFOUNDRY INC
  • US9396985B2 patent drawing
  • US9396985B2 patent drawing
  • US9396985B2 patent drawing

AI summary

Disclosed are an element isolation structure of a semiconductor device and a method for forming the same, the method including preparing a semiconductor substrate having an inactive region and an active region defined thereon, forming a first hard mask on the semiconductor substrate, exposing the inactive region of the semiconductor substrate by patterning the first hard mask, forming a second hard mask on the entire surface of the semiconductor substrate including the first hard mask, forming a deep trench in the semiconductor substrate by patterning the second hard mask and the semiconductor substrate, removing the patterned second hard mask, forming a shallow trench overlapped with the deep trench by patterning the semiconductor substrate using the first hard mask as a mask, forming an insulation film on the entire surface of the substrate including the shallow trench and the deep trench, filling the shallow trench and the deep trench by forming an element isolation film on the insulation film, and forming an element isolation film pattern in the deep trench and the shallow trench by selectively removing the element isolation film.