Semiconductor Isolation Layer Fabrication Using Protective Liner
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Solution Overview
Problem
The existing method for fabricating semiconductor isolation layers using the shallow trench isolation (STI) method often results in gate oxide integrity (GOI) failure due to damage of the liner nitride layer during wet etching, leading to reduced yield and reliability of semiconductor devices.
Innovation Solution
A method that includes forming a substrate, creating a trench, depositing a liner nitride and oxide layer, and using an insulation layer with a specific etch selectivity to prevent loss during wet etching, followed by filling with a high-density plasma (HDP) oxide layer, which includes additional buffer layers to protect against sputtering damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a wet etch is performed on the SOD oxide layer to allow it to remain in a portion of the trench, then the SOD oxide layer can be selectively retained, but the liner oxide layer is damaged and the liner nitride layer is exposed, causing GOI failure
Solution Approach 1:
A liner layer is formed prior to forming the SOD oxide layer and insulation layer. This preliminary liner layer protects the trench surface during subsequent wet etching and CMP processes, preventing damage to underlying layers while allowing selective removal of the SOD oxide layer where needed.
Solution Approach 2:
The liner layer acts as a protective cushion layer that absorbs the harmful effects of wet etching and CMP processes. By placing this sacrificial protective layer beforehand, the underlying critical layers (liner oxide and nitride layers) are shielded from direct damage, maintaining GOI while enabling selective SOD oxide removal.
2Manufacturing precision
If the liner nitride layer is exposed on the upper portion of the trench during wet etch, then the SOD oxide layer can be selectively removed, but the liner nitride layer may be damaged by sputtering during HDP oxide layer formation
Solution Approach 1:
The liner layer is formed as a preliminary protective structure before any etching or deposition processes. This ensures that when HDP oxide layer formation causes sputtering, the liner layer is already in place to protect the liner nitride layer, preventing exposure and subsequent damage.
Solution Approach 2:
The liner layer serves as a sacrificial cushion that absorbs sputtering damage during HDP oxide deposition. By having this protective layer in place beforehand, the critical liner nitride layer is shielded from direct sputtering exposure, maintaining its integrity and preventing GOI failure.
3Productivity
If the liner oxide layer is damaged during wet etch, then the etch process can proceed effectively, but the liner nitride layer becomes exposed and vulnerable to damage
Solution Approach 1:
The protective structure is segmented into multiple layers: the liner oxide layer, liner nitride layer, and the newly introduced liner layer. This segmentation allows the wet etch to selectively remove damaged portions of the liner oxide layer while the liner nitride layer and liner layer provide progressive protection, preventing complete exposure and damage to underlying structures.
Solution Approach 2:
The liner layer is formed beforehand as an additional protective cushion over the liner oxide layer. During wet etching, this preliminary cushion absorbs the impact of etchant exposure, allowing effective etching to proceed while preventing the liner oxide layer from being completely damaged and exposing the liner nitride layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents GOI failure by maintaining the integrity of the liner oxide and nitride layers, thereby enhancing the yield and reliability of semiconductor devices.
Implementation Method 1
a high density plasma (HDP) oxide layer 109 is formed to fill the remaining portion of the trench
Implementation Method 2
a spin on dielectric (SOD) oxide layer 108 is formed to fill a portion of the trench 104
Data Source
AI summary
A method for fabricating an isolation layer in a semiconductor device includes providing a substrate, forming a trench over the substrate, forming a liner nitride layer and a liner oxide layer along a surface of the trench, forming an insulation layer having an etch selectivity ratio different from that of the liner oxide layer over the liner oxide layer, forming a spin on dielectric (SOD) oxide layer to fill a portion of the trench over the insulation layer, and forming a high density plasma (HDP) oxide layer for filling the remaining a portion of the trench.