Semiconductor Isolation Patterning for Trench Depth and Width Control
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Solution Overview
Problem
Conventional manufacturing methods for shallow trench isolation in semiconductor structures face challenges in simultaneously controlling the cut depth and width, leading to fragile island features prone to shorting.
Innovation Solution
The method involves forming trenches in a semiconductor layer with a liner layer, followed by an isolation layer, and using a nitrite layer as a mask to etch and form through holes, with misaligned openings to control depth and width, and reinforcing the structure with an early-formed isolation layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing methods are used for shallow trench isolation, then the process is simple, but the cut depth and width cannot be simultaneously controlled and the island features are fragile
Solution Approach 1:
The patent divides the manufacturing process into distinct stages: forming isolation layer first, then creating nitrite layer, followed by multiple patterning steps with first and second photoresist layers. Each stage addresses specific dimensional controls, separating depth control (via first photoresist) from width control (via second photoresist), thereby achieving precise dimensional control while managing complexity through systematic process segmentation
Solution Approach 2:
The isolation layer is formed in advance before the trench patterning process. This preliminary action provides structural support to the semiconductor layer beforehand, preventing fragility and shorting during subsequent processing steps. The nitrite layer is also formed preliminarily as a mask layer to enable precise etching control in later stages
2Reliability
If conventional methods are used, then the process steps are fewer, but the island features are fragile and prone to shorting
Solution Approach 1:
The isolation layer is formed in advance before trench patterning to provide structural reinforcement. This preliminary structural support prevents the semiconductor layer from becoming fragile during subsequent processing, thereby improving reliability without significantly impacting manufacturing efficiency
Solution Approach 2:
The nitrite layer serves as an intermediary mask layer between the photoresist patterns and the underlying semiconductor structures. This intermediary layer enables precise transfer of patterns while protecting the underlying structures, improving reliability through better pattern fidelity and reduced defect formation
3Manufacturing precision
If misaligned openings are used in nitrite layer, then trench depth and width are precisely controlled, but the patterning process becomes more complex
Solution Approach 1:
The patterning process is segmented into two independent photoresist steps: the first photoresist layer controls the depth of trenches by defining initial opening positions, while the second photoresist layer controls the width by creating misaligned openings. This segmentation allows each layer to independently control one dimension, achieving precise 2D dimensional control while maintaining clear process separation
Solution Approach 2:
The patent transitions from single-layer patterning to multi-layer patterning, adding the vertical dimension of process steps to control horizontal dimensions. By using misaligned openings in the nitrite layer (created through sequential photoresist patterning), the method controls both trench depth and width independently, effectively using process sequence to achieve spatial precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control of trench dimensions and prevents structural collapse during manufacturing, enhancing the stability of the semiconductor array.
Implementation Method 1
patterning the nitrite layer includes forming a first photoresist layer on the nitrite layer, patterning the first photoresist layer, etching the nitrite layer by using the first photoresist layer as a mask to form a plurality of first openings
Implementation Method 2
etching the isolation layer, the liner layer and the semiconductor layer by using the nitrite layer as a mask to form through holes
Data Source
AI summary
A manufacturing method of a semiconductor structure includes forming a plurality of trenches in a semiconductor layer and a liner layer of a semiconductor array, in which the liner layer is located on the semiconductor layer, forming an isolation layer in the trenches and on the liner layer, forming a nitrite layer on the isolation layer, patterning the nitrite layer, etching the isolation layer, the liner layer and the semiconductor layer by using the nitrite layer as a mask to form a plurality of through holes and refilling the isolation layer in the through holes and on the top surface of the liner layer.