Semiconductor Isolation Trenches for Threshold Voltage Control
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Solution Overview
Problem
As semiconductor devices shrink, the increasing challenge of maintaining transistor pitch while minimizing short channel effects and dopant fluctuation leads to difficulties in controlling threshold voltage and reducing gate-induced drain leakage, particularly with boron implants causing unintended conductive property changes.
Innovation Solution
The introduction of isolation trenches with a second dielectric material, such as aluminum oxide, allows for electrostatic control of threshold voltage, reducing the need for boron doping and minimizing gate-induced drain leakage by creating a conductive bias opposing the channel bias, thereby maintaining uniform channel dopant concentration and reducing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If transistor pitch is decreased to shrink device size, then device density is improved, but short channel effects and dopant fluctuation increase leading to threshold voltage control difficulties
Solution Approach 1:
A dielectric material layer is introduced as an intermediary between the gate electrode and the channel region. This dielectric layer mediates the electrostatic interaction, allowing independent control of threshold voltage through the dielectric's properties (permittivity, thickness) without directly altering the channel dopant concentration, thus resolving the threshold voltage control difficulty caused by scaled transistor pitch
Solution Approach 2:
The patent changes the parameters of the gate structure by introducing a dielectric material with specific permittivity and thickness values. By adjusting these parameters, the threshold voltage can be controlled independently of the transistor dimensions, enabling threshold voltage tuning even as device pitch decreases and short channel effects become more pronounced
2Manufacturing precision
If boron implantation is used to control threshold voltage, then threshold voltage adjustment is achieved, but gate-induced drain leakage increases due to unintended conductive property changes
Solution Approach 1:
The dielectric material serves as an intermediary that enables threshold voltage control through electrostatic means rather than dopant implantation. This eliminates the need for boron implantation and its associated harmful effects, including gate-induced drain leakage caused by unintended conductive property changes in the channel region
Solution Approach 2:
The patent replaces the mechanical/chemical process of boron implantation with an electrostatic field-based approach using the dielectric material. This substitution eliminates the harmful side effects of dopant implantation, including increased gate-induced drain leakage, while maintaining threshold voltage control capability
3Manufacturing precision
If space between adjacent transistors is increased to reduce short channel effects, then threshold voltage control is improved, but minimum pitch of other components is limited
Solution Approach 1:
By changing the parameters of the gate structure (adding dielectric material with controlled permittivity and thickness), the patent achieves threshold voltage control without needing to increase the spacing between transistors. This allows maintaining minimum pitch while improving threshold voltage control through electrostatic modulation rather than geometric separation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively controls threshold voltage independently and decreases gate-induced drain leakage, enhancing the reliability and performance of shrinking semiconductor devices by reducing the reliance on boron implants and minimizing unintended dopant diffusion.
Implementation Method 1
performing a vapor etch on a first dielectric material at the working surface to recess the first dielectric material to a first intended depth of an opening relative to the working surface and to expose a second dielectric material on a sidewall of the opening
Implementation Method 2
performing a wet etch on the second dielectric material to recess the second dielectric material to the first intended depth
Data Source
AI summary
Systems, apparatuses, and methods related to semiconductor structure formation are described. An example method may include patterning a working surface of a semiconductor wafer. The method may further include performing a vapor etch on a first dielectric material at the working surface to recess the first dielectric material to a first intended depth of an opening relative to the working surface and to expose a second dielectric material on a sidewall of the opening. The method may further include performing a wet etch on the second dielectric material to recess the second dielectric material to the intended depth.