Semiconductor Device Jitter Reduction via Signal Selecting Circuit
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Solution Overview
Problem
In semiconductor test equipment, the IO pin has a blunter waveform and higher jitter compared to the driver pin, leading to inaccurate measurement of setup and hold characteristics due to the large amount of jitter in the data signal received at the IO pin, which affects the capture of data signals during high-speed operations.
Innovation Solution
A semiconductor device with a signal selecting circuit that interchanges and delays the output signals from the IO pin and driver pin, reducing jitter by using a signal selecting circuit to output signals in straight or cross connection based on a control signal, and a buffer circuit to provide a delay equivalent to the signal selecting circuit, allowing accurate data capture and measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the IO pin is used to receive the data strobe signal, then the device can perform data input/output operations, but the waveform becomes blunter and jitter increases, leading to inaccurate measurement of setup and hold characteristics
Solution Approach 1:
The patent introduces a driver pin as an intermediary component to generate the data strobe signal internally, bypassing the IO pin's waveform degradation issue. The driver pin's output signal with better waveform characteristics is used to trigger the latch circuit, thereby maintaining measurement accuracy while preserving data input/output functionality through the IO pin.
Solution Approach 2:
Instead of using the IO pin's output signal for latching (conventional approach), the patent inverts the approach by using the driver pin's output signal to latch the IO pin's data signal. This reversal allows the system to benefit from the driver pin's superior waveform characteristics for timing-critical operations.
2Productivity
If the IO pin waveform with high jitter is used for latching, then data transmission can proceed, but measurement errors increase during high-speed operations
Solution Approach 1:
The driver pin serves as a mediator that provides a clean, low-jitter timing signal to control the latching operation. This intermediary signal source enables high-speed data transmission through the IO pin while maintaining accurate capture timing, thus resolving the conflict between transmission speed and measurement precision.
Solution Approach 2:
The patent changes the critical parameter from IO pin signal characteristics to driver pin signal characteristics for the latching function. By using the driver pin's output waveform parameters (lower jitter, steeper edges) instead of the IO pin's degraded parameters, the system achieves both high-speed operation and accurate measurement.
Data Source
AI summary
Disclosed is a semiconductor device comprising: a signal selecting circuit for receiving, at first and second inputs thereof, respectively, a first signal output from a first initial-stage circuit that receives a data strobe signal from a first terminal, which is an input/output terminal, and a second signal output from a second initial-stage circuit that receives a data mask signal from a second terminal, which is an input terminal, and based upon a control signal that is supplied thereto, outputting the first and second signals from first and second outputs or interchanging the first and second signals and outputting the interchanged first and second signals from the second and first outputs; a buffer circuit for receiving an output signal from a third initial-stage circuit that receives a data signal from a data terminal; and a data latch circuit for latching a signal from the buffer circuit. The signal from the first output of the signal selecting circuit is supplied to the data latch circuit as a latch timing signal.