Semiconductor Junction Interface Space Region for Thermal Management

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Solution Overview

Problem

In semiconductor devices with three-dimensional lamination structures, the proximity of circuit surfaces leads to high heat generation density at junction interfaces, causing temperature increases that can decrease the reliability of the laminated bodies when operation guaranteed temperatures are exceeded.

Innovation Solution

A semiconductor device is designed with a space region at the junction interface between laminated bodies, where the periphery of this space region is surrounded by insulating and conductive films, preventing direct contact and thus reducing heat transfer and temperature increases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If circuit surfaces are placed in close proximity for three-dimensional lamination, then data transmission capacity and integration density are improved, but heat generation density and temperature increase at junction interfaces worsen

Engineering Contradiction:
Improvedata transmission capacityVSAvoidtemperature at junction interface
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

An insulating film is introduced as an intermediary layer between the circuit surfaces of the first and second laminated bodies. This mediator prevents direct thermal contact while allowing electrical connection through conductive portions, thereby reducing heat transfer between adjacent circuit surfaces maintaining temperature control in high-density lamination structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bonding interface is designed with spatially varying properties: insulating regions where heat blocking is needed, and conductive portions where electrical connection is required. This local differentiation allows simultaneous achievement of thermal isolation and electrical connectivity in the lamination structure

Inventive Principle:
Principle #3Local quality

2Temperature

If insulating film is provided between circuit surfaces, then heat transfer is reduced and temperature control is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvetemperature control at junction interfaceVSAvoidstructure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The insulating film and bonding structure are merged into a unified design where the same insulating layer that provides thermal isolation also serves as the bonding interface. The conductive portions are integrated within this structure, eliminating the need for separate thermal management components and reducing overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If direct bonding of junction electrodes is performed, then electrical connection is achieved, but heat transfer between laminated bodies increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidheat transfer at junction interface
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The bonding interface exhibits spatially differentiated properties with insulating regions for thermal isolation and conductive portions for electrical connection. This local quality variation allows the junction electrodes to be directly bonded for reliable electrical connection while the surrounding insulating film prevents heat transfer between the laminated bodies

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of a space region with insulating and conductive films at the junction interface effectively suppresses excessive temperature increases, enhancing the reliability of the laminated bodies by preventing heat transfer and maintaining operational temperatures within safe limits.

Implementation Method 1

a space region at a junction interface between a first laminated body and a second laminated body, wherein a periphery of the space region is surrounded by a first insulating film included in the first connection layer and a second insulating film included in the second connection layer

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS10541230B2Semiconductor device and method for manufacturing same
Publication Date: 2020.01.21 PANASONIC SEMICON SOLUTIONS CO LTD
  • US10541230B2 patent drawing
  • US10541230B2 patent drawing
  • US10541230B2 patent drawing

AI summary

A semiconductor device includes a first laminated body and a second laminated body. The first laminated body includes sequentially a first element, a first wiring layer, and a first connection layer that includes a first junction electrode, on a main surface of a first substrate. The second laminated body includes sequentially a second element, a second wiring layer, and a second connection layer that includes a second junction electrode, on a main surface of a semiconductor substrate. The first laminated body and the second laminated body are bonded by directly bonding the first junction electrode and the second junction electrode with the two junction electrodes facing each other. A space region is formed at a part of a junction interface between the first laminated body and the second laminated body.