Power Semiconductor Junction Termination for Avalanche Suppression

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Solution Overview

Problem

Conventional power semiconductor devices, such as diodes and IGBTs, experience increased reverse-recovery loss and power loss due to enlarged electric-field gradients caused by trapped holes in local lifetime control regions, leading to higher avalanche currents and voltage clamping below theoretical values.

Innovation Solution

A power semiconductor device structure featuring a low-concentration n− type base layer and a junction termination region with a middle-concentration n type base layer, which reduces the electric-field gradient and suppresses avalanche currents by preventing the spread of the depletion layer, thereby minimizing power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a local lifetime control region is formed within the base region to shorten the reverse recovery time, then the reverse recovery time is reduced, but the electric-field gradient is enlarged causing increased avalanche current and power loss

Engineering Contradiction:
Improvereverse recovery timeVSAvoidpower loss
Core Design Contradiction:
Loss of timeVSLoss of energy

Solution Approach 1:

The patent applies local quality by forming a local lifetime control region with specific impurity concentration (1E16 to 1E18 atoms/cm³) within the base region, creating a localized area with different electrical characteristics. This region has higher impurity concentration than the surrounding base region, which modifies the electric field distribution locally without affecting the entire device structure, thereby reducing reverse recovery time while controlling avalanche current.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the impurity concentration parameter in the local lifetime control region to optimize performance. By setting the impurity concentration between 1E16 and 1E18 atoms/cm³, the device achieves a balance between reverse recovery time and power loss. The specific concentration range modifies carrier lifetime and electric field distribution to prevent excessive avalanche current while maintaining fast switching characteristics.

Inventive Principle:
Principle #35Parameter changes

2Speed

If a local lifetime control region is formed to improve reverse recovery characteristics, then switching speed is improved, but trapped holes enlarge the electric-field gradient causing voltage clamping below theoretical values

Engineering Contradiction:
Improveswitching speedVSAvoidvoltage stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent creates a localized region with modified impurity concentration (1E16 to 1E18 atoms/cm³) within the base region, which affects electric field distribution only in that specific area. This localized modification enables fast switching through reduced carrier lifetime while the surrounding regions maintain proper voltage blocking characteristics, preventing excessive voltage clamping.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent optimizes the impurity concentration parameter in the local lifetime control region to balance switching speed and voltage stability. The concentration range of 1E16 to 1E18 atoms/cm³ is specifically chosen to reduce carrier lifetime for fast switching while avoiding excessive hole trapping that would cause severe voltage clamping and compromise reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure effectively reduces power loss and avalanche currents during reverse recovery and turn-off operations, enhancing the efficiency and reliability of power semiconductor devices.

Implementation Method 1

the gradient of electric-field strength in the diode is enlarged through positive charges of the trapped holes, whereby the avalanche voltage is lowered. Therefore, a voltage between a cathode and an anode is clamped at a voltage lower than a theoretical value, and occurrence of an avalanche current increases an anode current

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Implementation Method 2

a junction termination region formed in vicinity of or in contact with outside in a horizontal direction of the second contact layer

Methodology Applied
Scientific EffectDepletion layer:

Data Source

PatentUS7518197B2Power semiconductor device
Publication Date: 2009.04.14 TOSHIBA ELECTRONICS DEVICES & STORAGE CORPORARTION
  • US7518197B2 patent drawing
  • US7518197B2 patent drawing
  • US7518197B2 patent drawing

AI summary

A power semiconductor device has a first base layer of first conductive type, a contact layer of first conductive type formed on a surface of the first base layer, a second base layer of first conductive layer which is formed on the surface of the first base layer at a side opposite to the first contact layer and has an impurity concentration higher than that of the first base layer, a second contact layer of second conductive type formed on the surface of the first base layer or the second base layer, and a junction termination region formed in vicinity of or in contact with outside in a horizontal direction of the second contact layer.