Semiconductor Conductive Region Laser Anneal and Amorphization

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Solution Overview

Problem

The semiconductor integrated circuit (IC) industry faces challenges in manufacturing complex and reduced-sized IC structures, which are susceptible to defects and performance issues due to minor changes in electrical properties of components, particularly in the sources and drains, making it difficult to maintain high performance.

Innovation Solution

A method for manufacturing semiconductor structures involves receiving a substrate with transistors of different conductive types, performing laser anneals and amorphization to refine the conductive regions, forming a pre-silicide layer, and subsequent thermal anneal to create a silicide layer, which enhances the crystalline structure and electrical properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If laser anneal and amorphization processes are performed to refine conductive regions, then crystalline density and electrical resistance uniformity are improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical resistance uniformityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies laser annealing with specific energy parameters (e.g., 1-10 J/cm²) and amorphization processes to transform the crystalline structure of conductive regions. By controlling laser pulse duration, energy density, and thermal processing parameters, the method achieves uniform electrical resistance and high crystalline density without requiring additional process steps, thus improving precision without proportionally increasing complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces traditional mechanical or thermal annealing methods with laser-based annealing. The laser provides localized, precise energy delivery that achieves the desired crystalline structure and electrical properties without the need for complex mechanical positioning or extended thermal processing equipment, thereby improving precision while managing process complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If multiple annealing and amorphization steps are performed, then grain structure and dopant profiles are refined, but manufacturing time increases

Engineering Contradiction:
Improvegrain structure refinementVSAvoidmanufacturing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent combines laser annealing and amorphization into a single integrated process sequence. The laser annealing step simultaneously achieves grain structure refinement and dopant activation, while the subsequent amorphization step prepares the structure for silicide formation. By merging these functions into a coordinated sequence rather than separate processes, the method achieves high precision in grain structure while minimizing total processing time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The laser annealing is performed as a preliminary step before silicide formation, pre-refining the grain structure and activating dopants in advance. This preliminary action ensures that when subsequent steps occur, the material is already optimized, reducing the need for additional corrective or refinement steps and thereby decreasing overall manufacturing time while maintaining high precision.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If pre-silicide layer and thermal anneal are formed, then electrical contact properties are enhanced, but process steps increase

Engineering Contradiction:
Improveelectrical contact propertiesVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a pre-silicide layer as an intermediary between the conductive region and the final silicide contact. This intermediate layer, formed by depositing metal (e.g., cobalt, nickel) before thermal annealing, facilitates controlled silicide formation and ensures reliable electrical contact properties. The intermediary layer acts as a buffer that enables precise control over contact resistance and reliability without requiring additional complex process steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thermal annealing process induces phase transition in the pre-silicide layer, transforming it from a metallic state to a silicide compound state. This phase transition occurs at controlled temperatures (e.g., 400-600°C) and creates the desired electrical contact properties. By utilizing this natural phase transition, the method achieves reliable electrical contacts through a single thermal processing step rather than multiple deposition or etching steps.

Inventive Principle:
Principle #36Phase transitions

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the crystalline density and electrical resistance uniformity of the semiconductor structure, reducing defects and maintaining high performance by refining the grain structure and dopant profiles, thereby addressing the susceptibility to performance issues.

Implementation Method 1

performing a first laser anneal on the first conductive region

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

performing a first laser anneal on the first conductive region

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 3

performing a first amorphization on the first conductive region and the second conductive region

Methodology Applied
Scientific EffectAmorphization:

Implementation Method 4

performing a thermal anneal to the substrate to form a silicide layer

Methodology Applied
Scientific EffectThermal annealing: Annealing

Implementation Method 5

performing a second laser anneal on the first conductive region and the second conductive region

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 6

performing a second laser anneal on the first conductive region and the second conductive region

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11676867B2Method for manufacturing semiconductor structure
Publication Date: 2023.06.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11676867B2 patent drawing
  • US11676867B2 patent drawing
  • US11676867B2 patent drawing

AI summary

Methods of manufacturing a semiconductor structure are provided. One of the methods includes the following operations. A substrate is received, and the substrate includes a first conductive region and a second conductive region. A first laser anneal is performed on the first conductive region to repair lattice damage. An amorphization is performed on the first conductive region and the second conductive region to enhance silicide formation to a desired phase transformation in the subsequent operations. A pre-silicide layer is formed on the substrate. A thermal anneal is performed to the substrate to form a silicide layer from the pre-silicide layer. A second laser anneal is performed on the first conductive region and the second conductive region.