Semiconductor Wafer Laser Test Pattern Removal

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor chip manufacturing methods face inefficiencies in removing test patterns during the dicing process, particularly when test patterns are large and adjacent chips are coupled, limiting productivity and requiring multiple processing steps.

Innovation Solution

A semiconductor chip manufacturing method that uses a combination of laser irradiation to remove test patterns, mechanical grinding to thin the wafer, and plasma etching to divide the wafer, with a mask-purpose seat to control the plasma dicing process, allowing for efficient and simple step removal of test patterns while maintaining general-purpose characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two sorts of rotary blades are employed to remove test patterns, then the test patterns can be removed, but the total number of processing steps is increased and productivity is impeded

Engineering Contradiction:
Improvetest pattern removal completenessVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The test patterns are extracted and removed before the dicing process using a single rotary blade configured to remove test patterns. This separates the test pattern removal function from the dicing process, allowing each process to be optimized independently and eliminating the need for multiple blade types.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

A single rotary blade is designed to perform multiple functions: removing test patterns and performing the dicing cut. The blade geometry is optimized to achieve both functions in one operation, reducing the total number of processing steps while maintaining effectiveness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If plasma etching is used to remove test patterns, then damages of the circuit forming plane can be eliminated, but the method is limited to specific test pattern sizes and configurations

Engineering Contradiction:
Improvecircuit forming plane integrityVSAvoidapplicability to different test pattern configurations
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The mechanical dicing process is replaced with a plasma etching process for the actual cutting of the wafer. This substitution eliminates mechanical contact and associated damages to the circuit forming plane, while the plasma process provides versatility in handling different test pattern configurations through parameter adjustment.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the efficient removal of test patterns in simple steps, improving productivity and avoiding the need for multiple blade cutting or harmful etching gases, while ensuring the quality of the semiconductor chips.

Implementation Method 1

laser light is irradiated from the side of circuit forming planes of the integrated circuits along the scribe lines of the semiconductor wafer, the test patterns are removed in combination with a front plane layer of the semiconductor wafer

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

a plasma dicing step by which since a portion in the semiconductor wafer, which corresponds to the removed predetermined width of the mask-purpose seat, is plasma-etched after the mask work-processing step is performed

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 3

a wafer rear plane grinding step for mechanically grinding the semiconductor wafer under such a condition that the circuit protection seat has been adhered from a rear plane of the circuit forming plane so as to thin the semi-conductor wafer

Methodology Applied
Scientific EffectMechanical abrasion: Abrasion

Data Source

PatentUS7767554B2Method of manufacturing semicondictor chip
Publication Date: 2010.08.03 PANASONIC HOLDINGS CORP
  • US7767554B2 patent drawing
  • US7767554B2 patent drawing
  • US7767554B2 patent drawing

AI summary

An object is to provide a semiconductor chip manufacturing method capable of removing test patterns in a higher efficiency in simple steps, while a general-purpose characteristic can be secured.In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, laser light 5a is irradiated from the side of a circuit forming plane 1a so as to remove the test patterns 4; and thereafter, under such a condition that a circuit protection seat 6 is adhered onto a circuit forming plane 1a, a rear plane of the circuit forming plane 1a is mechanically thinned; a mask-purpose seat is adhered onto the rear plane 1b of the semiconductor wafer 1 after the plane thinning process; and then, a plasma dicing-purpose mask is work-processed by irradiating laser light. As a consequence, the semi-conductor wafer 1 can be held by employing one set of the circuit protection seat 6 from the thinning process up to the plasma dicing process.