Semiconductor Feature Lateral Dimension Uniformity
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in patterning material layers, particularly as feature sizes shrink, leading to differences in lateral dimensions between closely-spaced and widely-spaced features due to diffraction effects and etch processes, resulting in inconsistent operating parameters across semiconductor devices.
Innovation Solution
A method involving a two-step lithography and etching process, where features in nested regions are initially formed with accurate dimensions using a first lithography mask, and then features in isolated regions are reduced to match using a second lithography mask and lateral etch process, ensuring consistent lateral dimensions across the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If optical lithography is used to pattern material layers, then manufacturing capability is achieved, but diffraction effects cause closely-spaced features to be etched more rapidly than widely-spaced features, resulting in inconsistent lateral dimensions
Solution Approach 1:
The patent divides the patterning process into two separate lithography steps: a first lithography step that patterns all features with initial dimensions, and a second lithography step that selectively removes photoresist from isolated regions to enable selective etching. This segmentation allows independent control of closely-spaced and widely-spaced features, resolving the microloading effect that causes lateral dimension inconsistency.
Solution Approach 2:
The patent applies different etching conditions to different regions of the substrate. By using a second lithography step to selectively remove photoresist from isolated regions, the patent creates locally different etching environments: closely-spaced features are etched with standard conditions while isolated features are etched with modified conditions (such as adjusted power, pressure, or gas flow) to compensate for microloading effects and achieve uniform lateral dimensions.
2Productivity
If feature sizes are scaled down to increase device density, then productivity is improved, but patterning becomes more difficult due to diffraction and etch process variations
Solution Approach 1:
The patent segments the etching process into two distinct steps with different photoresist masking configurations. The first step patterns all features at reduced size, and the second step selectively modifies isolated regions. This allows continued scaling of feature sizes for increased device density while maintaining patterning accuracy through the compensatory second etching step.
Solution Approach 2:
The patent changes etching parameters (such as power, pressure, gas flow, or chemistry) between the two etching steps to compensate for microloading effects. By adjusting these parameters in the second step, the patent maintains patterning accuracy even as feature sizes are scaled down to increase device density.
3Device complexity
If a single lithography step is used to pattern all features, then device complexity is reduced, but inconsistent lateral dimensions result between closely-spaced and isolated features
Solution Approach 1:
The patent divides the patterning process into two lithography steps and two etching steps. The first lithography step patterns all features, and the second lithography step selectively removes photoresist from isolated regions. This segmentation enables different etching conditions for closely-spaced versus isolated features, achieving uniform lateral dimensions despite the increased process complexity.
Solution Approach 2:
The patent applies locally different etching conditions to different feature types. By using selective photoresist removal in the second lithography step, the patent creates region-specific etching environments that compensate for microloading effects, ensuring that both closely-spaced and isolated features achieve the same lateral dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that features in both nested and isolated regions have substantially the same lateral dimensions, thereby achieving uniform operating parameters and performance characteristics across semiconductor devices, addressing the issue of inconsistent feature sizes and microloading effects.
Implementation Method 1
Optical photolithography involves projecting or transmitting light through a pattern made of optically opaque or translucent areas and optically clear or transparent areas on a mask or reticle
Implementation Method 2
The material layers typically comprise thin films of conductive, semiconductive, and insulating materials that are patterned and etched to form integrated circuits
Data Source
AI summary
Semiconductor devices and methods of manufacturing thereof are disclosed. A plurality of features is formed on a workpiece, the plurality of features being located in a first region and a second region of the workpiece. Features in the first region have a first lateral dimension, and features in the second region have a second lateral dimension, wherein the second lateral dimension is greater than the first lateral dimension. The first region is masked, and the second lateral dimension of features in the second region is reduced.


