Semiconductor Layer Crystal Orientation for PMOS Stress Reduction
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Solution Overview
Problem
The existing semiconductor apparatus with p-channel metal oxide semiconductor (PMOS) transistors does not exhibit excellent characteristics, indicating a need for performance improvement in semiconductor layers.
Innovation Solution
A semiconductor apparatus is designed with a first semiconductor layer having specific crystal orientations and a p-type metal insulator semiconductor (MIS) transistor, where the crystal structure of the first layer has varying Young's modulus directions, and the angles of the transistor's source and drain are optimized to reduce stress-induced distortion, enhancing transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional PMOS transistor structure is used in semiconductor layers, then the device can be manufactured with standard processes, but the transistor characteristics and performance are insufficient
Solution Approach 1:
The patent changes the crystal orientation parameter of the semiconductor layer from conventional orientations to specific orientations (where the angle between the crystal orientation and the source-drain direction is 30-60 degrees). This parameter change improves transistor characteristics by reducing stress-induced distortion in the channel, while maintaining compatibility with standard manufacturing processes
Solution Approach 2:
The patent employs a composite structure combining semiconductor layers with specific crystal orientations and p-type MIS transistors. This composite approach creates synergistic effects where the optimized crystal orientation works together with the transistor structure to enhance overall device performance and reliability
2Reliability
If the semiconductor layer has uniform crystal orientation, then the manufacturing process is simple, but stress-induced distortion affects transistor performance
Solution Approach 1:
The patent applies local quality by configuring the semiconductor layer with specific crystal orientations in particular regions. The crystal orientation is optimized locally where transistors are formed, with the angle between crystal orientation and source-drain direction being 30-60 degrees, while other regions may have different orientations. This localized optimization reduces stress-induced distortion in critical transistor areas without requiring complex configurations throughout the entire semiconductor layer
3Productivity
If standard crystal orientations are used in semiconductor layers, then manufacturing is straightforward, but direction-dependent stress reduces yield
Solution Approach 1:
The patent changes the crystal orientation parameter from standard orientations to optimized orientations where the angle between the crystal orientation and source-drain direction falls within 30-60 degrees. This parameter change eliminates direction-dependent stress that plagues conventional designs, significantly improving manufacturing yield. The angle range of 30-60 degrees is specifically chosen to minimize stress-induced distortion while remaining achievable with current manufacturing capabilities
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the performance and yield of semiconductor transistors by reducing direction-dependent stress and distortion, leading to better transistor characteristics and increased manufacturing yield.
Implementation Method 1
a Young's modulus of the first semiconductor layer in a direction along the first crystal orientation is higher than a Young's modulus of the first semiconductor layer in a direction along the second crystal orientation
Data Source
AI summary
A semiconductor apparatus includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, and a wiring structure arranged between them. The second semiconductor layer is provided with p-type MIS transistor. A crystal structure of the first semiconductor layer has a first crystal orientation and a second crystal orientation in direction along a principal surface of the first semiconductor layer. A Young's modulus of the first semiconductor layer in a direction along the first crystal orientation is higher than that in a direction along the second crystal orientation. An angle formed by the first crystal orientation and a direction in which a source and a drain of the p-type MIS transistor are arranged is more than 30 degrees and less than 60 degrees, and an angle formed by the second crystal orientation and that direction is 0 degrees or more and 30 degrees or less.


