Semiconductor Layer Structure for ON Voltage and Switching Loss Control

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Solution Overview

Problem

Semiconductor devices, such as IGBTs, face challenges in controlling the trade-off characteristic between ON voltage and switching loss, as existing methods like carrier lifetime control are complex and difficult to manage effectively.

Innovation Solution

The semiconductor device incorporates a specific layer structure with a drift layer, buffer layers, and collector layers of varying impurity concentrations, allowing for precise control of impurity profiles to optimize ON voltage and switching loss without relying on carrier lifetime control methods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a carrier lifetime control method is used to generate recombination centers in the semiconductor substrate, then the trade-off relationship between ON voltage and switching loss can be controlled, but complex defects are formed and the ability to optimize both parameters simultaneously is limited

Engineering Contradiction:
Improvecontrol of trade-off relationship between ON voltage and switching lossVSAvoidformation of complex defects
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention extracts the recombination center generation function from the drift layer and relocates it to a dedicated buffer layer. This separation allows the drift layer to maintain high purity without complex defects while the buffer layer independently provides the necessary recombination centers for controlling the trade-off relationship between ON voltage and switching loss.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention segments the semiconductor structure into functionally distinct layers: a drift layer optimized for low ON voltage without recombination centers, and a buffer layer specifically designed to provide recombination centers for switching loss control. This segmentation enables independent optimization of both parameters without mutual interference.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a P- layer with defect prevention function is used, then collector short circuit due to defects is prevented, but the relationship between ON voltage and switching loss cannot be controlled to any characteristic

Engineering Contradiction:
Improveprevention of collector short circuitVSAvoidcontrol of ON voltage and switching loss relationship
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The invention extracts the recombination center generation function from the drift layer and relocates it to a dedicated buffer layer. This separation allows the drift layer to maintain high purity without complex defects while the buffer layer independently provides the necessary recombination centers for controlling the trade-off relationship between ON voltage and switching loss.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The buffer layer acts as an intermediary between the drift layer and the contact layer, providing recombination centers without compromising the drift layer's defect-free structure. This intermediary layer enables control of the ON voltage and switching loss relationship while maintaining collector short circuit prevention.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240274699A1Semiconductor device and method for manufacturing the same
Publication Date: 2024.08.15 MITSUBISHI ELECTRIC CORP
  • US20240274699A1 patent drawing
  • US20240274699A1 patent drawing
  • US20240274699A1 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate, a drift layer of a first conductivity type, a buffer layer of the first conductivity type, a first semiconductor layer, and a second semiconductor layer. The first semiconductor layer and the second semiconductor layer are provided on the side of the second main surface of the semiconductor substrate with respect to the buffer layer. The first semiconductor layer and the second semiconductor layer are arranged in this order in a direction from the second main surface toward the first main surface of the semiconductor substrate. The first semiconductor layer and the second semiconductor layer have conductivity types identical to each other. The second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer.